Patents by Inventor John Coronati

John Coronati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260121766
    Abstract: An interconnect module having a base substrate with a microcontroller on a top surface and a photonic integrated circuit (PIC) and photodetector array on an opposed bottom surface is described. The interconnect module has a top and bottom fiber assembly, which both have a row of optical fibers. The bottom fiber assembly is actively aligned with the PIC to maximize optical coupling efficiency between the bottom fiber assembly and the PIC and then permanently affixed in this position. The top fiber assembly is actively aligned with the photodetector array to maximize optical coupling efficiency between the top fiber assembly and the photodetector array and then permanently affixed in this position.
    Type: Application
    Filed: October 26, 2023
    Publication date: April 30, 2026
    Inventors: Marc EPITAUX, John L. NIGHTINGALE, John CORONATI
  • Publication number: 20250219310
    Abstract: This present disclosure increases the interconnect density by using a different technology approach than the industry is currently using (stamping and molding). By using a MEMS-based technology approach, better geometry and impedance control can be carried out to reduce impedance discontinuities and feature size. Additional concepts include low connector insertion force, no contact wiping, and a precise alignment mechanism between the connector contacts and those on the mating substrate.
    Type: Application
    Filed: March 18, 2025
    Publication date: July 3, 2025
    Inventors: Marc Epitaux, Eric J. Zbinden, John Coronati, Jignesh H. Shah, Brandon Thomas Gore
  • Patent number: 12278441
    Abstract: This present disclosure increases the interconnect density by using a different technology approach than the industry is currently using (stamping and molding). By using a MEMS-based technology approach, better geometry and impedance control can be carried out to reduce impedance discontinuities and feature size. Additional concepts include low connector insertion force, no contact wiping, and a precise alignment mechanism between the connector contacts and those on the mating substrate.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: April 15, 2025
    Assignee: SAMTEC, INC.
    Inventors: Marc Epitaux, Eric J. Zbinden, John Coronati, Jignesh H. Shah, Brandon Thomas Gore
  • Publication number: 20250054929
    Abstract: An optical engine having an optically transparent substrate with a lens on a first major surface and an optoelectronic element on an opposed second major surface is described. The optical engine has a sealed optical path and is capable of operating submerged in a cooling liquid. The optical engine may be attached to a mounting substrate to form an optoelectronic subassembly that may be incorporated in many different types of optical interconnects.
    Type: Application
    Filed: December 22, 2022
    Publication date: February 13, 2025
    Inventors: Marc EPITAUX, John CORONATI
  • Publication number: 20240170303
    Abstract: An interconnection system includes a mating substrate that is configured to be placed in electrical communication with a main board along an insertion direction so as to define a separable interface. The interconnection system is configured to align the mating substrate with the main board along first and second transverse directions that are perpendicular to each other and to the insertion direction.
    Type: Application
    Filed: March 30, 2022
    Publication date: May 23, 2024
    Inventors: John CORONATI, Marc EPITAUX, Brandon Thomas GORE
  • Patent number: 11409063
    Abstract: Waveguides of optically transparent interposers are adiabatically coupled to respective waveguides of photonic integrated circuits that are mounted to the optically transparent interposers. In particular, photonic integrated circuits can be mounted to an interposer that has both optical connections and electrical connections. The optical connections of the interposer can be adiabatically coupled to the photonic integrated circuit. The electrical connections can be connected to the photonic integrated circuit and to a host board that also supports an ASIC.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 9, 2022
    Assignee: SAMTEC, INC.
    Inventors: Marc Epitaux, John Coronati
  • Publication number: 20210215897
    Abstract: Waveguides of optically transparent interposers are adiabatically coupled to respective waveguides of photonic integrated circuits that are mounted to the optically transparent interposers. In particular, photonic integrated circuits can be mounted to an interposer that has both optical connections and electrical connections. The optical connections of the interposer can be adiabatically coupled to the photonic integrated circuit. The electrical connections can be connected to the photonic integrated circuit and to a host board that also supports an ASIC.
    Type: Application
    Filed: February 5, 2019
    Publication date: July 15, 2021
    Inventors: Marc EPITAUX, John CORONATI
  • Publication number: 20210194164
    Abstract: This present disclosure increases the interconnect density by using a different technology approach than the industry is currently using (stamping and molding). By using a MEMS-based technology approach, better geometry and impedance control can be carried out to reduce impedance discontinuities and feature size. Additional concepts include low connector insertion force, no contact wiping, and a precise alignment mechanism between the connector contacts and those on the mating substrate.
    Type: Application
    Filed: September 4, 2019
    Publication date: June 24, 2021
    Inventors: Marc EPITAUX, Eric J. ZBINDEN, John CORONATI, Jignesh H. SHAH, Brandon Thomas GORE
  • Patent number: 10962296
    Abstract: A method of fabricating a heat pipe may include providing a first material as a body section. The method may include stamping or etching the body section to include the cavity. A portion of the body section may constitute a wall of the cavity. The method may include stamping or etching the wall of the cavity to provide a set of corrugations on a portion of the wall of the cavity. The method may include forming an opening in the wall of the cavity. The method may include attaching a lid over the cavity. The lid constituting at least a portion of a hermetic seal of the cavity. The method may include attaching a cover to the body section approximately adjacent to the opening in the cavity. The method may include attaching a valve to the body section approximately at the opening to the cavity.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: March 30, 2021
    Assignee: Infinera Corporation
    Inventors: John W. Osenbach, Jie Tang, S. Eugene Messenger, John Coronati
  • Publication number: 20190137186
    Abstract: A method of fabricating a heat pipe may include providing a first material as a body section. The method may include stamping or etching the body section to include the cavity. A portion of the body section may constitute a wall of the cavity. The method may include stamping or etching the wall of the cavity to provide a set of corrugations on a portion of the wall of the cavity. The method may include forming an opening in the wall of the cavity. The method may include attaching a lid over the cavity. The lid constituting at least a portion of a hermetic seal of the cavity. The method may include attaching a cover to the body section approximately adjacent to the opening in the cavity. The method may include attaching a valve to the body section approximately at the opening to the cavity.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 9, 2019
    Inventors: John W. Osenbach, Jie Tang, S. Eugene Messenger, John Coronati
  • Patent number: 10175005
    Abstract: A method of fabricating a heat pipe may include providing a first material as a body section. The method may include stamping or etching the body section to include the cavity. A portion of the body section may constitute a wall of the cavity. The method may include stamping or etching the wall of the cavity to provide a set of corrugations on a portion of the wall of the cavity. The method may include forming an opening in the wall of the cavity. The method may include attaching a lid over the cavity. The lid constituting at least a portion of a hermetic seal of the cavity. The method may include attaching a cover to the body section approximately adjacent to the opening in the cavity. The method may include attaching a valve to the body section approximately at the opening to the cavity.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: January 8, 2019
    Assignee: Infinera Corporation
    Inventors: John W. Osenbach, Jie Tang, S. Eugene Messenger, John Coronati
  • Publication number: 20160290734
    Abstract: A method of fabricating a heat pipe may include providing a first material as a body section. The method may include stamping or etching the body section to include the cavity. A portion of the body section may constitute a wall of the cavity. The method may include stamping or etching the wall of the cavity to provide a set of corrugations on a portion of the wall of the cavity. The method may include forming an opening in the wall of the cavity. The method may include attaching a lid over the cavity. The lid constituting at least a portion of a hermetic seal of the cavity. The method may include attaching a cover to the body section approximately adjacent to the opening in the cavity. The method may include attaching a valve to the body section approximately at the opening to the cavity.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventors: John W. OSENBACH, Jie TANG, S. Eugene MESSENGER, John CORONATI
  • Publication number: 20060006526
    Abstract: The specification describes electrical assemblies comprising actively cooled components wherein a thermal interposer is used to limit heat transfer between the ambient and the cooled components. The thermal interposer is effective for transmitting signals for both power/ground and RF. Structurally, the thermal interposer comprises thin conductors in various configurations that convey electrical signals but significantly limit heat flow.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 12, 2006
    Inventors: John Coronati, Gustav Derkits, David Daugherty, Christopher Fuchs, John Geary, David Lischner