Patents by Inventor John D. Cressler
John D. Cressler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240063521Abstract: A transversal radio frequency filter circuit having a low noise amplifier connected along an input signal path, a first power divider connected between the low noise amplifier and four single taps, and an output path connected to the outputs of each of the four single taps. Each of the four single taps having a coefficient control mechanism, a polarity selection mechanism, and a time delay element. The coefficient control mechanism can include a wideband digital step attenuator configured to support high control range of the coefficient. Additionally, the circuit can include a second power divider connected between the outputs of each of the four single taps and the output path. The circuit can further include a field-programmable gate array configured to control coefficient control mechanisms, the polarity selection mechanisms, and the time delay elements (when they are variable time delay elements).Type: ApplicationFiled: November 3, 2023Publication date: February 22, 2024Inventors: Nelson Estacio Lourenco, Adilson Silva Cardoso, Moon-Kyu Cho, Christopher Timothy Coen, John D. Cressler, Douglas Robert Denison, William B. Hunter, Ickhyun Song
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Publication number: 20240006548Abstract: An exemplary embodiment of the present disclosure provides an avalanche photodiode (APD), comprising: a p-doped substrate; a first n-doped region; an n-doped epitaxial region; a plurality of n-doped wells; and a first p-doped region. The first n-doped region can be positioned above at least a portion of the p-doped substrate. The n-doped epitaxial region can be positioned above at least a portion of the first n-doped region. The plurality of n-doped wells can be positioned within the first n-doped epitaxial region. The first p-doped region can be positioned above the n-doped epitaxial region and the plurality of n-doped wells.Type: ApplicationFiled: August 26, 2022Publication date: January 4, 2024Inventors: Patrick Stephen Goley, John D. Cressler
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Patent number: 11848475Abstract: Provided is a transversal radio frequency filter circuit having a low noise amplifier connected along an input signal path, a first power divider connected between the low noise amplifier and four single taps, and an output path connected to the outputs of each of the four single taps. Each of the four single taps having a coefficient control mechanism, a polarity selection mechanism, and a time delay element. The coefficient control mechanism can include a wideband digital step attenuator configured to support high control range of the coefficient. Additionally, the circuit can include a second power divider connected between the outputs of each of the four single taps and the output path. The circuit can further include a field-programmable gate array configured to control coefficient control mechanisms, the polarity selection mechanisms, and the time delay elements.Type: GrantFiled: March 18, 2020Date of Patent: December 19, 2023Assignee: Georgia Tech Research CorporationInventors: Nelson Estacio Lourenco, Adilson Silva Cardoso, Moon-Kyu Cho, Christopher Timothy Coen, John D. Cressler, Douglas Robert Denison, William B. Hunter, Ickhyun Song
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Publication number: 20220181762Abstract: Provided is a transversal radio frequency filter circuit having a low noise amplifier connected along an input signal path, a first power divider connected between the low noise amplifier and four single taps, and an output path connected to the outputs of each of the four single taps. Each of the four single taps having a coefficient control mechanism, a polarity selection mechanism, and a time delay element. The coefficient control mechanism can include a wideband digital step attenuator configured to support high control range of the coefficient. Additionally, the circuit can include a second power divider connected between the outputs of each of the four single taps and the output path. The circuit can further include a field-programmable gate array configured to control coefficient control mechanisms, the polarity selection mechanisms, and the time delay elements.Type: ApplicationFiled: March 18, 2020Publication date: June 9, 2022Inventors: Nelson Estacio Lourenco, Adilson Silva Cardoso, Moon-Kyu Cho, Christopher Timothy Coen, John D. Cressler, Douglas Robert Denison, William B. Hunter, Ickhyun Song
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Patent number: 11296659Abstract: A bi-directional amplifier (BDA) comprises a first pair of amplifier transistors and a second pair of amplifier transistors, wherein the first pair of amplifier transistors are cross-coupled with the second pair of amplifier transistors, and wherein the first pair of amplifier transistors and the second pair of amplifier transistors each comprise a differential common-emitter (CE) pair (or common-source (CS) pair) with equal transistor size or different transistor size. The BDA further comprises a plurality of blocking capacitors to decouple the collector and the base biases of the first pair of amplifier transistors and the second pair of amplifier transistors. Alternatively or additionally, the BDA further comprises two input/output baluns, through which a common voltage bias is applied to the collectors of each of the differential CE pairs (or drains of CS pairs in some implementations). The baluns enable single-ended measurement and characterization.Type: GrantFiled: March 20, 2019Date of Patent: April 5, 2022Assignee: Georgia Tech Research CorporationInventors: Yunyi Gong, Moon-Kyu Cho, John D. Cressler, Ickhyun Song
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Publication number: 20210126590Abstract: A bi-directional amplifier (BDA) comprises a first pair of amplifier transistors and a second pair of amplifier transistors, wherein the first pair of amplifier transistors are cross-coupled with the second pair of amplifier transistors, and wherein the first pair of amplifier transistors and the second pair of amplifier transistors each comprise a differential common-emitter (CE) pair (or common-source (CS) pair) with equal transistor size or different transistor size. The BDA further comprises a plurality of blocking capacitors to decouple the collector and the base biases of the first pair of amplifier transistors and the second pair of amplifier transistors. Alternatively or additionally, the BDA further comprises two input/output baluns, through which a common voltage bias is applied to the collectors of each of the differential CE pairs (or drains of CS pairs in some implementations). The baluns enable single-ended measurement and characterization.Type: ApplicationFiled: March 20, 2019Publication date: April 29, 2021Inventors: Yunyi GONG, Moon-Kyu CHO, John D. CRESSLER, Ickhyun SONG
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Patent number: 10979038Abstract: A method for in-phase (I) and quadrature (Q) signal generation is disclosed. The method may include a first stage receiving a differential input signal. The first stage may also generate first differential in-phase and quadrature output signals, which may be sent by the first stage to a second stage. The second stage may generate second differential in-phase and quadrature output signals, which may have amplitude and phase mismatches less than an amplitude and phase mismatches of the first differential output signals. The second stage may then output the second differential I/Q output signals.Type: GrantFiled: August 21, 2019Date of Patent: April 13, 2021Assignee: Georgia Tech Research CorporationInventors: Milad Frounchi, John D. Cressler
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Publication number: 20200067497Abstract: A method for in-phase (I) and quadrature (Q) signal generation is disclosed. The method may include a first stage receiving a differential input signal. The first stage may also generate first differential in-phase and quadrature output signals, which may be sent by the first stage to a second stage. The second stage may generate second differential in-phase and quadrature output signals, which may have amplitude and phase mismatches less than an amplitude and phase mismatches of the first differential output signals. The second stage may then output the second differential I/Q output signals.Type: ApplicationFiled: August 21, 2019Publication date: February 27, 2020Inventors: Milad Frounchi, John D. Cressler
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Patent number: 8546850Abstract: Superjunction collectors for transistors are discussed in this application. According to one embodiment, a bipolar transistor having a superjunction collector structure can comprise a collector electrode, a base electrode, an emitter electrode, a collector-base space charge region, and a superjunction collector. The collector-base space charge region can be disposed in electrical communication between the collector electrode and the base electrode. The superjunction collector region can be disposed in the collector-base space charge region. The superjunction collector region can comprise a plurality of alternating horizontally disposed P-type and N-type layers. The layers can be horizontally disposed layers that are layered on top of each other. The P-type and N-type layers can be doped with different types of doping levels. Other aspects, embodiments, and features are also discussed and claimed.Type: GrantFiled: April 8, 2010Date of Patent: October 1, 2013Assignee: Georgia Gech Research CorporationInventors: Jiahui Yuan, John D. Cressler
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Patent number: 8498576Abstract: The various embodiments of the present disclosure relate generally to inverse-mode Radio-Frequency (“RF”) switching circuits and methods of using the same. An embodiment of the present invention provides an inverse-mode RF switching circuit. The inverse-mode RF switching circuit comprises a bipolar transistor, a shunt element, a first RF channel, and a second RF channel. The bipolar transistor comprises a base, a collector, and an emitter, wherein the base and emitter are in electrical communication first via a base-emitter junction and second via an electrical connection element. The shunt element is in electrical communication with the collector. The first RF channel is in electrical communication with the base and emitter. The second RF channel is in electrical communication with the collector and the shunt element. The base-collector junction operates as a switching diode between the first RF channel and the second RF channel.Type: GrantFiled: April 8, 2011Date of Patent: July 30, 2013Assignee: Georgia Tech Research CorporationInventors: Anuj Madan, John D. Cressler
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Patent number: 8212291Abstract: Disclosed is a device structure using an inverse-mode cascoded Silicon-Germanium (SiGe) Heterojunction Bipolar Transistor (HBT) beneficial in applications requiring radiation hardened circuitry. The device comprises a forward-mode common-emitter HBT cascoded with a common-base inverse-mode HBT, sharing a common sub-collector. An exemplary device was measured to have over 20 dB of current gain, and over 30 dB of power gain at 10 GHz, thus demonstrating the use of these circuits for high-frequency circuit applications. In addition, the radiation response and voltage limits were characterized and showed to have negligible performance effects in typical operating conditions. Due to the unique topology, the disclosed device has the benefit of being a more compact cascode design and the additional benefit of providing significantly improved radiation tolerance.Type: GrantFiled: March 11, 2009Date of Patent: July 3, 2012Assignee: Georgia Tech Research CorporationInventors: Tushar K. Thrivikraman, Aravind Appaswamy, John D. Cressler
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Publication number: 20110309412Abstract: Superjunction collectors for transistors are discussed in this application. According to one embodiment, a bipolar transistor having a superjunction collector structure can comprise a collector electrode, a base electrode, an emitter electrode, a collector-base space charge region, and a superjunction collector. The collector-base space charge region can be disposed in electrical communication between the collector electrode and the base electrode. The superjunction collector region can be disposed in the collector-base space charge region. The superjunction collector region can comprise a plurality of alternating horizontally disposed P-type and N-type layers. The layers can be horizontally disposed layers that are layered on top of each other. The P-type and N-type layers can be doped with different types of doping levels. Other aspects, embodiments, and features are also discussed and claimed.Type: ApplicationFiled: April 8, 2010Publication date: December 22, 2011Applicant: Georgia Tech Research CorporationInventors: Jiahui Yuan, John D. Cressler
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Publication number: 20110248771Abstract: The various embodiments of the present disclosure relate generally to inverse-mode Radio-Frequency (“RF”) switching circuits and methods of using the same. An embodiment of the present invention provides an inverse-mode RF switching circuit. The inverse-mode RF switching circuit comprises a bipolar transistor, a shunt element, a first RF channel, and a second RF channel. The bipolar transistor comprises a base, a collector, and an emitter, wherein the base and emitter are in electrical communication first via a base-emitter junction and second via an electrical connection element. The shunt element is in electrical communication with the collector. The first RF channel is in electrical communication with the base and emitter. The second RF channel is in electrical communication with the collector and the shunt element. The base-collector junction operates as a switching diode between the first RF channel and the second RF channel.Type: ApplicationFiled: April 8, 2011Publication date: October 13, 2011Applicant: Georgia Tech Research CorporationInventors: Anuj Madan, John D. Cressler
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Publication number: 20090231034Abstract: Disclosed is a device structure using an inverse-mode cascoded Silicon-Germanium (SiGe) Heterojunction Bipolar Transistor (HBT) beneficial in applications requiring radiation hardened circuitry. The device comprises a forward-mode common-emitter HBT cascoded with a common-base inverse-mode HBT, sharing a common sub-collector. An exemplary device was measured to have over 20 dB of current gain, and over 30 dB of power gain at 10 GHz, thus demonstrating the use of these circuits for high-frequency circuit applications. In addition, the radiation response and voltage limits were characterized and showed to have negligible performance effects in typical operating conditions. Due to the unique topology, the disclosed device has the benefit of being a more compact cascode design and the additional benefit of providing significantly improved radiation tolerance.Type: ApplicationFiled: March 11, 2009Publication date: September 17, 2009Inventors: Tushar K. Thrivikraman, Aravind Appaswamy, John D. Cressler
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Patent number: 5185276Abstract: A method for improving the low temperature current gain of silicon bipolar transistors by implanting a first and a second impurity of the same conductivity type into the base region to provide a high doping level base that increases bandgap narrowing without decreasing freeze-out activation energy. The second impurity is selected to have a higher ionization energy that that of the first impurity. The second impurity thereby freezes out sooner than the first impurity resulting in the freeze-out activation energy being equal to or greater than the energy with only the first impurity.Type: GrantFiled: April 23, 1991Date of Patent: February 9, 1993Assignee: International Business Machines CorporationInventors: Tze-Chiang Chen, John D. Cressler