Patents by Inventor John D. Hamre
John D. Hamre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8547426Abstract: Systems, apparatus, and methods for providing a micro-scanning system with low settle times for fingerprint image capture are provided. In one embodiment, a flexure apparatus includes a stiffening device and parallelogram structures. The flexure apparatus is configured to move an image sensor to different positions to capture images that can be used to form a composite image according to micro-scanning techniques. The stiffening device allows the resonant frequency of the flexure apparatus to be established at a higher level than the operation frequency of the flexure apparatus, minimizing the settle time required for the flexure apparatus.Type: GrantFiled: June 14, 2010Date of Patent: October 1, 2013Assignee: Identix IncorporatedInventors: John D. Hamre, Daniel F. Maase
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Patent number: 8354640Abstract: Apparatus and methods for providing an optically based planar scanner for generating an image are provided. In one embodiment, the apparatus includes a switchable Bragg grating. An area of the switchable Bragg grating is configured to be activated to direct light to a platen. The platen is configured to reflect the light to a waveguide or to refract the light. The light reflected to the waveguide is guided to a light detector. By activating a number of the areas of the switchable Bragg grating and measuring the intensity of the light with a light detector, an image of an object contacting the platen may be formed.Type: GrantFiled: September 9, 2010Date of Patent: January 15, 2013Assignee: Identix IncorporatedInventors: John D. Hamre, Daniel F. Maase
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Patent number: 7933726Abstract: A system, method, and apparatus for obtaining a record of logic level transitions within a signal, and for accurately determining a voltage-time pair exhibited by the signal. To achieve these ends, a front-end device may be mated to a real-time sampling system, such as an oscilloscope. The front-end device effectively permits the oscilloscope to observe signals exhibiting greater data rates than otherwise possible without the front-end device.Type: GrantFiled: October 23, 2007Date of Patent: April 26, 2011Assignee: Gigamax Technologies, Inc.Inventors: John D. Hamre, Peng Li, Steven Fraasch
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Publication number: 20110063604Abstract: Apparatus and methods for providing an optically based planar scanner for generating an image are provided. In one embodiment, the apparatus includes a switchable Bragg grating. An area of the switchable Bragg grating is configured to be activated to direct light to a platen. The platen is configured to reflect the light to a waveguide or to refract the light. The light reflected to the waveguide is guided to a light detector. By activating a number of the areas of the switchable Bragg grating and measuring the intensity of the light with a light detector, an image of an object contacting the platen may be formed.Type: ApplicationFiled: September 9, 2010Publication date: March 17, 2011Applicant: IDENTIX INCORPORATEDInventors: John D. Hamre, Daniel F. Maase
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Publication number: 20100315499Abstract: Systems, apparatus, and methods for providing a micro-scanning system with low settle times for fingerprint image capture are provided. In one embodiment, a flexure apparatus includes a stiffening device and parallelogram structures. The flexure apparatus is configured to move an image sensor to different positions to capture images that can be used to form a composite image according to micro-scanning techniques. The stiffening device allows the resonant frequency of the flexure apparatus to be established at a higher level than the operation frequency of the flexure apparatus, minimizing the settle time required for the flexure apparatus.Type: ApplicationFiled: June 14, 2010Publication date: December 16, 2010Applicant: IDENTIX INCORPORATEDInventors: Daniel F. Maase, John D. Hamre
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Patent number: 6699395Abstract: A method of forming a conductive device includes forming a conductive layer on a substrate; etching the conductive layer to form a plurality of conductive traces; etching the conductive layer to form at least one mask feature; and removing substrate material that is not covered by the at least one mask feature so as to form at least one mechanical alignment feature.Type: GrantFiled: October 18, 2000Date of Patent: March 2, 2004Assignee: Storage Technology CorporationInventors: John W. Svenkeson, John D. Hamre
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Patent number: 6641408Abstract: A conductive device includes a substrate and a plurality of conductive traces supported by the substrate. Each trace has a contact portion. Moreover, sufficient substrate material is removed from the substrate to sufficiently lessen stiffness of selected ones of the contact portions so that the selected ones of the contact portions are independently displaceable with respect to each other. A method of manufacturing such a conductive device is also provided.Type: GrantFiled: October 18, 2000Date of Patent: November 4, 2003Assignee: Storage Technology CorporationInventors: John W. Svenkeson, John D. Hamre
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Patent number: 6508674Abstract: A conductive network includes a first conductive device having multiple first signal layers. Each first signal layer has a first substrate and a plurality of first conductive traces disposed on one side of the first substrate. The network further includes a second conductive device having multiple second signal layers. Each second signal layer has a second substrate and a plurality of second conductive traces disposed on one side of the second substrate. In addition, the network includes at least one bridge layer for electrically joining together the first and second conductive devices. The at least one bridge layer has a bridge substrate and a plurality of bridge traces supported by the bridge substrate.Type: GrantFiled: October 18, 2000Date of Patent: January 21, 2003Assignee: Storage Technology CorporationInventors: John W. Svenkeson, John D. Hamre
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Patent number: 6431876Abstract: A method of connecting a first conductive device to a second conductive device is provided. The first conductive device has a first conductive trace supported by a first substrate. The first trace has a generally planar first surface spaced away from the first substrate that defines a first edge. The second conductive device has a second conductive trace supported by a second substrate. The second trace has a generally planar second surface spaced away from the second substrate that defines a second edge. The method includes joining the first edge of the first trace with the second trace to form an area of contact such that a portion of the first surface proximate the area of contact is non-parallel with a portion of the second surface proximate the area of contact.Type: GrantFiled: October 18, 2000Date of Patent: August 13, 2002Assignee: Storage Technology CorporationInventors: John W. Svenkeson, John D. Hamre
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Patent number: 6230229Abstract: A method and system for transmitting data among a plurality of cards in a crossbar interconnect network having a plurality of cards each having source paths and destination paths utilizes a plurality of source arbitrators and a plurality of destination arbitrators each associated with the cards. The source arbitrators generate connection request commands from the source paths requesting access to a desired destination path and broadcasts the request for receipt by all of the destination arbitrators. The destination arbitrator associated with the desired destination path captures the connection request command and processes the command based on whether or not the desired destination path is busy. If the desired destination path is not busy, the destination arbitrator generates a connection command requesting a connection be made between the source path and the desired destination path.Type: GrantFiled: December 19, 1997Date of Patent: May 8, 2001Assignee: Storage Technology CorporationInventors: Christopher J. Van Krevelen, Reed S. Nelson, Don J. Hodapp, Jr., John D. Hamre
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Patent number: 5808529Abstract: A ground plane interconnection is provided on first and second substrates, the first and second substrates having respective first and second ground layers disposed on a first surface of each of the first and second substrates. A ground conductor strip is disposed on a second surface of the second substrate, wherein the ground conductor strip includes a plurality of electrically conductive members which pass through the second substrate to electrically couple the ground conductor strip and the second ground layer. The first substrate is positioned with respect to the second substrate such that when the first substrate is placed proximate the second substrate, the ground conductor strip electrically couples the first and second ground layers to form a continuous ground plane. A method of forming a reduced-inductance continuous ground plane is also provided.Type: GrantFiled: July 12, 1996Date of Patent: September 15, 1998Assignee: Storage Technology CorporationInventor: John D. Hamre
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Patent number: 5530302Abstract: A circuit board capable of live-insertion or hot-swapping into a live chassis backplane. The circuit board is provided with a power control circuitry for gracefully ramping up board power after insertion, or gracefully removing power just prior to physical removal of a circuit board from the board slot. A pair of ejector levers are provided on each side of the circuit board. A push button switch is provided proximate one ear thereof and is selectively opened or closed depending upon the position of an ejector cover which can be secured thereover in an interlocking relationship. Upon retraction of the extractor cover, the switch is opened, and the converse applies. Power MOSFETs are provided between the card edge and the board power busses which are gracefully turned on and off as a function of the switch position. A high-side gate driver provides an increased bias voltage, which bias voltage is communicated through the closed switch to the gates of the MOSFETs.Type: GrantFiled: January 13, 1994Date of Patent: June 25, 1996Assignee: Network Systems CorporationInventors: John D. Hamre, Denton G. Wicklund, Steven D. Barkley
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Patent number: 5481563Abstract: A jitter measurement system for a serial digital data link includes a clock recovery element effective to separate a clock signal from the digital data bits being transmitted. The clock signal is applied first to a programmable delay element whose output is applied to as a first input to a decision circuit. The second input to the decision is the serial data stream. The relation of the data to the clock is initially set so that the clock is sampling the data at approximately the transition point of the data. Depending on the exact location of the data relative to the clock signal, the result of the sampling process will yield one of two results. First, if the data transition occurs before the clock transition, no error results. However, if the clock transition occurs before the data transition, an error results. An error ratio detector circuit determines an error ratio which is compared to a predetermined reference.Type: GrantFiled: March 14, 1994Date of Patent: January 2, 1996Assignee: Network Systems CorporationInventor: John D. Hamre