Abstract: A method for providing a programmable electrostatic discharge (ESD) protection device is provided. The method includes providing a source diffusion in a substrate, providing a deeper body diffusion in the substrate, providing a gate at a space between the source diffusion and the body diffusion, and providing a variable structure for shorting the source diffusion and the body diffusion to each other when ESD voltage is encountered on a circuit connected thereto, wherein the variable structure comprises a plurality of contacts over the source diffusion for the source diffusion to be grounded to the body diffusion.

Abstract: An electrostatic discharge (ESD) protection device is disclosed. The ESD protection device comprises a source diffusion in a substrate and a deeper body diffusion in the substrate. The ESD protection device further includes a gate function provided at a space between the source diffusion and the body diffusion surface terminations; and further includes a drain located a predetermined distance from the body diffusion. Finally, the ESD protection device includes a structure for shorting the source and the body diffusion to each other and to ground at variable distances from the channel region, thus providing a programmable variable snap back voltage to provide a protection when an ESD voltage is encountered.

Abstract: A resistivity map is prepared depicting the sheet resistance of a resistive film formed on a wafer as a function of position on the wafer. The resistivity map includes a plurality of zones each of which encompasses a specific range of resistivities of the resistive film. A mask containing numerous patterns which define associated resistors in the resistive film is divided into a plurality of zones which correspond to the plurality of zones of the resistivity map. One or more of the dimensions of the resistor patterns within each zone of the mask is automatically altered in a manner so as to compensate for the resistivity range of the corresponding zone of the resistivity map. Thus, in those portions of the resistive film where the sheet resistance is higher than the film's intended value, the width of the patterns in corresponding portions of the resistor mask are increased by an appropriate amount, thereby compensating for the higher sheet resistance.

Abstract: An antifuse according to the present invention includes a lower electrode formed from a first metal interconnect layer in an integrated circuit or the like. The lower electrode is disposed on an insulating surface. An inter-metal dielectric including an antifuse aperture disposed there lies over the inter-metal dielectric layer. The antifuse aperture extends through the inter-metal dielectric layer and also extends completely through the lower electrode. An antifuse material is disposed in the antifuse aperture. An upper electrode formed from a first metal interconnect layer is disposed over the antifuse material.

Abstract: A circuit which protects against damage to an integrated circuit caused by electrostatic discharge (ESD) includes a resistor connected at one end to an input pad, and a pair of back-to-back Schottky diodes connected to the other end of the resistor. The cathodes of the Schottky diodes are connected to each other by a common semiconductor substrate and connected to a supply voltage. The anode of one of the Schottky diodes is grounded, and the anode of the other Schottky diode is connected to a node in common with the other end of the resistor and a circuit component to be protected from an ESD spike. The Schottky diodes, when forward biased by an ESD spike, do not inject minority carriers into the substrate. In this way, unwanted PNP, NPN, or four-layer diode problems are avoided and recovery from an ESD spike is rapid.

Abstract: An antifuse according to the present invention includes a lower electrode formed from a first metal interconnect layer in an integrated circuit or the like. The lower electrode is disposed on an insulating surface. An inter-metal dielectric including an antifuse aperture disposed there lies over the inter-metal dielectric layer. The antifuse aperture extends through the inter-metal dielectric layer and also extends completely through the lower electrode. An antifuse material is disposed in the antifuse aperture. An upper electrode formed from a first metal interconnect layer is disposed over the antifuse material.

Abstract: An antifuse according to the present invention includes a lower electrode formed from a first metal interconnect layer in an integrated circuit or the like. The lower electrode is disposed on an insulating surface. An inter-metal dielectric including an antifuse aperture disposed there lies over the inter-metal dielectric layer. The antifuse aperture extends through the inter-metal dielectric layer and also extends completely through the lower electrode. An antifuse material is disposed in the antifuse aperture. An upper electrode formed from a first metal interconnect layer is disposed over the antifuse material.