Patents by Inventor John D. Lam

John D. Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6724222
    Abstract: A technique and circuitry interfaces a programmable logic integrated circuit compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, an on-chip voltage less than the external supply level of the programmable logic integrated circuit is provided to a core portion of a programmable logic integrated circuit by way of a conversion transistor. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. Externally, the programmable logic integrated circuit will interface with an external supply voltage level. The input and output signals to and from the programmable logic integrated circuit will be compatible with the external supply level.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: April 20, 2004
    Assignee: Altera Corporation
    Inventors: Rakesh H. Patel, John E. Turner, John D. Lam, Wilson Wong
  • Publication number: 20030117174
    Abstract: A technique provides an on-chip voltage to a core portion of a programmable logic integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of the integrated circuit. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. By providing the core with a reduced voltage, the integrated circuit may interface with other integrated circuits compatible with different voltage levels.
    Type: Application
    Filed: February 13, 2003
    Publication date: June 26, 2003
    Applicant: Altera Corporation, a corporation of Delaware
    Inventors: Rakesh H. Patel, John E. Turner, John D. Lam, Wilson Wong
  • Patent number: 6563343
    Abstract: A technique provides an on-chip voltage to a core portion of an integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of the integrated circuit. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. By providing the core with a reduced voltage, the integrated circuit may interface with other integrated circuits compatible with different voltage levels.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: May 13, 2003
    Assignee: Altera Corporation
    Inventors: Rakesh H. Patel, John E. Turner, John D. Lam, Wilson Wong
  • Patent number: 6414518
    Abstract: A technique provides an on-chip voltage to a core portion of an integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of the integrated circuit. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. By providing the core with a reduced voltage, the integrated circuit may interface with other integrated circuits compatible with different voltage levels.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: July 2, 2002
    Assignee: Altera Corporation
    Inventors: Rakesh H. Patel, John E. Turner, John D. Lam, Wilson Wong
  • Patent number: 6025737
    Abstract: A technique and circuitry for interfacing an integrated circuit manufactured using technology compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, the integrated circuit is fabricated using technology compatible with an internal supply voltage level. Externally, the integrated circuit will interface with an external supply voltage level, above the internal supply voltage. The input and output signals to and from the integrated circuit will be compatible with the external supply level. The integrated circuit may include a voltage down converter (1330) and level shifter (1317).
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: February 15, 2000
    Assignee: Altera Corporation
    Inventors: Rakesh H. Patel, John E. Turner, John D. Lam, Wilson Wong