Patents by Inventor John D. Pequet

John D. Pequet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4918562
    Abstract: A power controller comprises a manually-on circuit breaker having an electrically-actuatable trip coil which enables the circuit breaker to be tripped-off electrically. The circuit breaker is connected to a voltage source and provides operating voltage to a power outlet. A line voltage monitor provides a voltage indication to a logic control circuit when operating voltage moves outside a predetermined range established by setting upper and lower operating voltage limits. In response to receiving such a voltage indication, the logic control circuit deenergizes a relay, thereby connecting a charged capacitor to the tripping coil of the circuit breaker to cause the breaker to be tripped-off even when the voltage to the circuit breaker drops to zero volts. Other signals provided to the control logic circuit also cause the deenergizing of the relay controlling the circuit breaker tripping capacitor.
    Type: Grant
    Filed: January 30, 1989
    Date of Patent: April 17, 1990
    Assignee: Pulizzi Engineering, Inc.
    Inventors: Peter S. Pulizzi, John D. Pequet, Roger W. Cook, Stephen J. Kane
  • Patent number: 4769555
    Abstract: Multi-time delay power controller apparatus for providing time delayed power-up and power-down for associated electrical equipment, such as computer systems, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an internal D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay turn-on timing stages connected in electrical series with one another between the D.C. bus and ground. Each such stage comprises an R-C circuit and a type 555 integrated circuit which together function as a timer. Included in each stage is a control relay. The energizing coils of the relays in odd numbered stages are connected to ground and of even numbered stages to the D.C. bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, the timing of the first-in-sequence stage being started when the apparatus is turned on.
    Type: Grant
    Filed: July 24, 1987
    Date of Patent: September 6, 1988
    Assignee: Pulizzi Engineering Inc.
    Inventors: John D. Pequet, Michael B. Pulizzi, Roger Cook
  • Patent number: 4719364
    Abstract: Multi-time delay power controller apparatus for providing time-delayed power or control signals to associated electrical equipment, such as computers and disc drives, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an interval D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay timing stages connected in electrical series to one another between the D.C. voltage bus and ground. Each such timing stage includes a timing means, and a normally open control relay. Coils of odd numbered timing stages are connected to ground and of even numbered stages to the D.C. voltage bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, timing of the first-in-sequence timing stage being started when the apparatus is turned on.
    Type: Grant
    Filed: October 1, 1985
    Date of Patent: January 12, 1988
    Assignee: Pulizzi Engineering, Inc.
    Inventors: John D. Pequet, Michael B. Pulizzi, Roger Cook