Abstract: A high frequency matrix transformer power converter module includes a dedicated, pre-wired secondary winding, inductor and filter capacitor wherein the electrical conductor forming the dedicated secondary winding is made from a flat ribbon material and passes through adjacent cores forming the interdependent magnetic elements of the matrix transformer such that helical portions of the conductor forming the winding are in complementary arrangement within the core structure and provide an opening through which a second electrical conductor forming a primary winding may be inserted after the module is constructed to obtain the desired transformation characteristics. A number of modules may be arranged side-by-side to provide a higher power output wherein the output voltage busses of the modules are connected together and wherein through holes of each module are in registry to permit wiring of an undedicated primary winding to obtain the desired power output.

Abstract: A multipin matrix capacitor includes a first and second electrode separated by a dielectric material to form a capacitive element and includes terminals for connecting it to the first and second electrode wherein the terminals are distributed along the electrodes in a grid arrangement. Inductances are minimized or substantially eliminated in lead connections to the matrix capacitor due to the reduced conduction path lengths possible between an external component and the capacitor since access to the capacitor is provided at substantially all areas of the electrodes forming the capacitor. In one aspect of the invention, DC current is conducted along the surface of conductive sheets comprising the electrodes.

Abstract: A Power-On-Reset (POR) Circuit compares a logic supply voltage to a reference voltage and provides a logic voltage validity signal if the logic voltage is greater than the reference voltage; the circuit delays, on startup, the validity signal for a selected period and then provides a drive signal for driving a solid-state switch which provides an open circuit on the presence of the drive signal, indicating logic voltage validity, and a short circuit in its absence, indicating invalidity; and the circuit immediately disables the drive signal if the logic voltage falls below the reference voltage. The selected start-up delay period is independent of the supply voltage magnitude.