Patents by Inventor John D. Schlesselmann

John D. Schlesselmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11108967
    Abstract: Techniques are disclosed for systems and methods for facilitating infrared imaging in multiple imaging modes. A device may include an infrared image capture circuit and at least one processing circuit. The infrared image capture circuit may be configured to detect first infrared data and generate a first pixel value based on the first infrared data and a first imaging mode among multiple imaging modes. The at least one processing circuit may be configured to compare the first pixel value to a set of saturation threshold values associated with the first imaging mode. The at least one processing circuit may be further configured to select an imaging mode among the multiple imaging modes based on the comparison of the first pixel value. The at least one processing circuit may be further configured to set the infrared image capture circuit to generate a second pixel value based on the selected imaging mode.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: August 31, 2021
    Assignee: FLIR Systems, Inc.
    Inventors: Joseph Kostrzewa, Naseem Y. Aziz, John D. Schlesselmann, Brian B. Simolon, Theodore B. Hoelter
  • Patent number: 11092625
    Abstract: Techniques are provided to facilitate current sensing recovery for imaging systems and methods. In one example, a device includes a detector configured to detect electromagnetic radiation and generate a detection signal based on the detected electromagnetic radiation. The device further includes a current sensing circuit configured to provide, based on the detection signal, a first signal. The device further includes a signal generator configured to provide a second signal to adjust a bandwidth associated with the current sensing circuit. The device further includes an imaging integration circuit configured to generate an image of at least a portion of a scene based at least in part on the first signal. Related methods and systems are also provided.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: August 17, 2021
    Assignee: FLIR COMMERCIAL SYSTEMS, INC.
    Inventors: John D. Schlesselmann, Brian B. Simolon
  • Patent number: 11044422
    Abstract: Techniques are disclosed for systems and methods for facilitating pixel readout with partitioned analog-to-digital conversion. A device includes a detector, a capacitor coupled to the detector, a counter circuit coupled to the capacitor, a reset circuit coupled to the capacitor, and a processing circuit. The detector is configured to detect electromagnetic radiation associated with a scene and generate an associated detection signal. The capacitor is configured to, during an integration period, accumulate a voltage based on the detection signal. The counter circuit is configured to, during the integration period, adjust a counter value based on a comparison of the voltage and a reference voltage. The reset circuit is configured to, during the integration period, reset the capacitor based on the comparison. The processing circuit is configured to generate a digital detector output based on the counter value when the integration period has elapsed. Related methods are also provided.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: June 22, 2021
    Assignee: FLIR SYSTEMS, INC.
    Inventors: Brian B. Simolon, Robert F. Cannata, John D. Schlesselmann, Mark T. Nussmeier, Eric A. Kurth
  • Publication number: 20200150160
    Abstract: Techniques are provided to facilitate current sensing recovery for imaging systems and methods. In one example, a device includes a detector configured to detect electromagnetic radiation and generate a detection signal based on the detected electromagnetic radiation. The device further includes a current sensing circuit configured to provide, based on the detection signal, a first signal. The device further includes a signal generator configured to provide a second signal to adjust a bandwidth associated with the current sensing circuit. The device further includes an imaging integration circuit configured to generate an image of at least a portion of a scene based at least in part on the first signal. Related methods and systems are also provided.
    Type: Application
    Filed: November 8, 2019
    Publication date: May 14, 2020
    Inventors: John D. SCHLESSELMANN, Brian B. SIMOLON
  • Publication number: 20190342480
    Abstract: Techniques are disclosed for systems and methods for facilitating infrared imaging in multiple imaging modes. A device may include an infrared image capture circuit and at least one processing circuit. The infrared image capture circuit may be configured to detect first infrared data and generate a first pixel value based on the first infrared data and a first imaging mode among multiple imaging modes. The at least one processing circuit may be configured to compare the first pixel value to a set of saturation threshold values associated with the first imaging mode. The at least one processing circuit may be further configured to select an imaging mode among the multiple imaging modes based on the comparison of the first pixel value. The at least one processing circuit may be further configured to set the infrared image capture circuit to generate a second pixel value based on the selected imaging mode.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Joseph Kostrzewa, Naseem Y. Aziz, John D. Schlesselmann, Brian B. Simolon, Theodore B. Hoelter
  • Publication number: 20190335118
    Abstract: Techniques are disclosed for systems and methods for facilitating pixel readout with partitioned analog-to-digital conversion. A device includes a detector, a capacitor coupled to the detector, a counter circuit coupled to the capacitor, a reset circuit coupled to the capacitor, and a processing circuit. The detector is configured to detect electromagnetic radiation associated with a scene and generate an associated detection signal. The capacitor is configured to, during an integration period, accumulate a voltage based on the detection signal. The counter circuit is configured to, during the integration period, adjust a counter value based on a comparison of the voltage and a reference voltage. The reset circuit is io configured to, during the integration period, reset the capacitor based on the comparison. The processing circuit is configured to generate a digital detector output based on the counter value when the integration period has elapsed. Related methods are also provided.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 31, 2019
    Inventors: Brian B. Simolon, Robert F. Cannata, John D. Schlesselmann, Mark T. Nussmeier, Eric A. Kurth
  • Patent number: 9052381
    Abstract: Various techniques are provided for performing detection using a focal plane array (FPA). For example, in one embodiment, a unit cell of an FPA may be implemented to support rapid sampling in response to one or more laser pulses reflected from an object or feature of interest. An FPA implemented with such unit cells may be used, for example, in an imaging system capable of detecting a plurality of two dimensional image frames and providing a three dimensional image using the detected two dimensional image frames. Other applications of such rapid sampling unit cells are also contemplated.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: June 9, 2015
    Assignee: FLIR Systems, Inc.
    Inventors: James T. Woolaway, John D. Schlesselmann
  • Patent number: 8946640
    Abstract: Various techniques are disclosed for providing reference signals to image detectors in accordance with one or more embodiments of the invention. For example, in one or more embodiments, switched capacitors may be used to provide bias voltages to individual unit cells of a focal plane array such that the bias voltages are held by the unit cells over one or more integration periods while the unit cells are decoupled from an input line. As a result, the bias voltages may be free from noise incident on the input line and thus may more accurately bias the individual unit cells.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: February 3, 2015
    Assignee: FLIR Systems, Inc.
    Inventors: James T. Woolaway, John D. Schlesselmann
  • Patent number: 8587637
    Abstract: Various techniques are provided for forming three-dimensional images. For example, in one embodiment, a system for three-dimensional imaging of an object includes an imaging sensor that provides a focal plane array and a sensor controller. The system also includes a laser illuminator coupled to the sensor controller. The laser illuminator is adapted to emit at least one laser pulse to be reflected from at least one plane of the object and detected by the focal plane array as at least one two-dimensional image frame of light intensities. The sensor controller is adapted to associate a range dimension of the plane with the image frame to facilitate formation of a three-dimensional image of the object. Related methods are also contemplated.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: November 19, 2013
    Assignees: Lockheed Martin Corporation, Flir Systems, Inc.
    Inventors: Michael E. Cryder, Henry J Tatko, James T. Woolaway, John D. Schlesselmann
  • Publication number: 20130277561
    Abstract: Various techniques are disclosed for providing reference signals to image detectors in accordance with one or more embodiments of the invention. For example, in one or more embodiments, switched capacitors may be used to provide bias voltages to individual unit cells of a focal plane array such that the bias voltages are held by the unit cells over one or more integration periods while the unit cells are decoupled from an input line. As a result, the bias voltages may be free from noise incident on the input line and thus may more accurately bias the individual unit cells.
    Type: Application
    Filed: June 20, 2013
    Publication date: October 24, 2013
    Inventors: James T. Woolaway, John D. Schlesselmann
  • Publication number: 20110272559
    Abstract: Various techniques are provided for performing detection using a focal plane array (FPA). For example, in one embodiment, a unit cell of an FPA may be implemented to support rapid sampling in response to one or more laser pulses reflected from an object or feature of interest. An FPA implemented with such unit cells may be used, for example, in an imaging system capable of detecting a plurality of two dimensional image frames and providing a three dimensional image using the detected two dimensional image frames. Other applications of such rapid sampling unit cells are also contemplated.
    Type: Application
    Filed: May 7, 2010
    Publication date: November 10, 2011
    Applicant: FLIR SYSTEMS, INC.
    Inventors: James T. Woolaway, John D. Schlesselmann
  • Patent number: 7034301
    Abstract: Systems and methods for microbolometer focal plane arrays are disclosed. For example, in accordance with an embodiment of the present invention, microbolometer focal plane array circuitry is disclosed for a microbolometer array having shared contacts between adjacent microbolometers. Various techniques may be applied to compensate for non-uniformities, such as for example, to allow operation over a calibrated temperature range.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: April 25, 2006
    Assignee: Indigo Systems Corporation
    Inventors: William J. Parrish, Naseem Y. Aziz, Eric A. Kurth, John D. Schlesselmann
  • Publication number: 20040200961
    Abstract: Systems and methods for microbolometer focal plane arrays are disclosed. For example, in accordance with an embodiment of the present invention, microbolometer focal plane array circuitry is disclosed for a microbolometer array having shared contacts between adjacent microbolometers. Various techniques may be applied to compensate for non-uniformities, such as for example, to allow operation over a calibrated temperature range.
    Type: Application
    Filed: January 20, 2004
    Publication date: October 14, 2004
    Inventors: William J. Parrish, Naseem Y. Aziz, Eric A. Kurth, John D. Schlesselmann
  • Patent number: 6040568
    Abstract: An IR-FPA (10) having a plurality of radiation detectors (2a) and a multipurpose ROIC (2) is disclosed. The radiation detectors (2a) are organized as a two dimensional array. The multipurpose ROIC (2) includes a plurality of readout circuit unit cells, individual ones of which are coupled to individual radiation detectors (2a) for receiving electrical signals therefrom. Each of the readout circuit unit cells operates in one of a first mode to provide a corrected m frame averaged output signal (Vout.sub.THPF) or, a second mode to provide a subframed averaged output signal (Vout.sub.2). In the first operating mode, a high pass filtering circuit subtracts a low frequency charge pedestal from the electrical signal to form the corrected m frame averaged output (Vout.sub.THPF).
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: March 21, 2000
    Assignee: Raytheon Company
    Inventors: John T. Caulfield, Richard H. Wyles, John D. Schlesselmann, Kevin L. Pettijohn
  • Patent number: 5477173
    Abstract: An ultra low power gain circuit (UGC) implements a unique operational mode of a source follower circuit, and enables programmable gains greater than unity. A MOSFET has a gate terminal coupled to an input capacitance (Cin). A potential at a drain of the MOSFET is clocked to enable charge to flow through the channel. This charge charges a capacitor (Cout) that is connected to a source of the MOSFET. After charging Cout, the drain potential is restored to an initial value, and the charge on Cout discharges back through the MOSFET until the source voltage is one threshold drop from the gate potential, at which time the MOSFET turns off. Cout then stops discharging, and the final voltage appearing on Cout is a function of the magnitude of the gate voltage appearing on Cin. As the voltage at the source of the MOSFET changes, capacitive coupling, via (Cgs) to the gate, causes the gate voltage to also change. The value of the gate voltage determines a magnitude of a final voltage to which the source settles.
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: December 19, 1995
    Assignee: Santa Barbara Research Center
    Inventors: John D. Schlesselmann, Kevin L. Pettijohn, William H. Frye, Mary J. Hewitt