Patents by Inventor John David Brazzle
John David Brazzle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096775Abstract: Methods, and systems, are presented for a Structural Bridge for Electrically Isolated Metal Clips by mounting on a substrate a first and a second circuit. These first and second circuits can include Component on Package (CoP) electronic parts that are electrically contacted to the substrate with metal clips mounted on the surface of the substrate. The metal clips are electrically connected to respective circuit first and second circuits by an electrical connection on or in the substrate. The metal clips are folded over the respective first and second circuits. The folded-over portion of the first metal clip and the folded-over portion of the second metal clip are electrically isolated from each other. A third circuit package that is mounted on and electrically connected to a folded-over portion of the first metal clip and to a folded-over portion of the second metal clip.Type: ApplicationFiled: September 16, 2022Publication date: March 21, 2024Inventors: Hien Minh Pham, Melvin Sto Domingo Nava, John David Brazzle
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Patent number: 11844178Abstract: An electronic device and a method of forming such an electronic device are disclosed. The electronic device can include an integrated device package and a component. The integrated device package includes a substrate and a package body over the substrate, and a hole formed through the package body to expose a conductive pad of the substrate. The component is mounted over the package body, and includes a component body and a lead extending from the component body through the hole. The lead includes an insulated portion and a distal exposed portion, and the insulated portion includes a conductor and an insulating layer disposed about the conductor, wherein the distal exposed portion is uncovered by the insulating layer such that the conductor is exposed at the distal portion. The electronic device can also include a conductive material that electrically connects the distal exposed portion to the conductive pad of the substrate.Type: GrantFiled: May 19, 2021Date of Patent: December 12, 2023Assignee: Analog Devices International Unlimited CompanyInventors: John David Brazzle, Sok Mun Chew
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Publication number: 20230335328Abstract: A low-profile coupled inductor is disclosed to provide compact and high performance magnetic coupling. The low-profile coupled inductor has an asymmetrical geometry, having a pair of complementary ferrite cores supporting a pair of conducting strips in an alternating serpentine pattern. One or more core gaps exist between the cores to create a strong flux coupling between adjacent magnetic fields of either conducting strip. The alternating serpentine conductors and core gaps serve to increase energy transfer between the magnetic fields and improve the overall power density of the low-profile coupled inductor.Type: ApplicationFiled: April 18, 2022Publication date: October 19, 2023Inventors: Steve Hawley, George Anthony Serpa, John David Brazzle, Jim Yang
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Patent number: 11476232Abstract: A packaging technology in which power switching elements, such as field-effect transistors (FETs), can be oriented in a vertical position relative to the printed circuit board (PCB) on which the product is mounted. The power die including the switching element(s) can essentially stand “on end” so that they take up very little PCB area. Multiple dies can be positioned this way, and the dies can be attached to a heat sink structure, which is designed to take the heat generated by the dies onto the top of the package. The heat sink structure can be attached to a structure to route the power and analog signals properly to the desired pins/leads/balls of the finished product. Using these techniques can result in a significant increase in the power density (both PCB space and solution volume) of power switching elements, e.g., FETs.Type: GrantFiled: March 12, 2020Date of Patent: October 18, 2022Assignee: Analog Devices International Unlimited CompanyInventors: Albert M. Wu, John David Brazzle, Zafer Kutlu
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Patent number: 11270986Abstract: This disclosure describes techniques to provide a regulator circuit using a component-on-top (CoP) package. The CoP package comprising a system-in-package (SIP) comprising regulator circuitry, the SIP having a top portion and a first side portion; and an inductor on the top portion of the SIP, wherein: the inductor is coupled to the regulator circuitry via the top portion of the SIP; and a first end of the inductor extends beyond the first side portion of the SIP.Type: GrantFiled: August 20, 2020Date of Patent: March 8, 2022Assignee: Analog Devices, Inc.Inventors: Ahmadreza Odabaee, John David Brazzle, Zafer Kutlu, Zhengyang Liu, George Anthony Serpa
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Patent number: 11272618Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module.Type: GrantFiled: April 11, 2017Date of Patent: March 8, 2022Assignee: Analog Devices International Unlimited CompanyInventors: John David Brazzle, Frederick E. Beville, David A. Pruitt
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Publication number: 20210358895Abstract: This disclosure describes techniques to provide a regulator circuit using a component-on-top (CoP) package. The CoP package comprising a system-in-package (SIP) comprising regulator circuitry, the SIP having a top portion and a first side portion; and an inductor on the top portion of the SIP, wherein: the inductor is coupled to the regulator circuitry via the top portion of the SIP; and a first end of the inductor extends beyond the first side portion of the SIP.Type: ApplicationFiled: August 20, 2020Publication date: November 18, 2021Inventors: Ahmadreza Odabaee, John David Brazzle, Zafer Kutlu, Zhengyang Liu, George Anthony Serpa
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Publication number: 20200312814Abstract: A packaging technology in which power switching elements, such as field-effect transistors (FETs), can be oriented in a vertical position relative to the printed circuit board (PCB) on which the product is mounted. The power die including the switching element(s) can essentially stand “on end” so that they take up very little PCB area. Multiple dies can be positioned this way, and the dies can be attached to a heat sink structure, which is designed to take the heat generated by the dies onto the top of the package. The heat sink structure can be attached to a structure to route the power and analog signals properly to the desired pins/leads/balls of the finished product. Using these techniques can result in a significant increase in the power density (both PCB space and solution volume) of power switching elements, e.g., FETs.Type: ApplicationFiled: March 12, 2020Publication date: October 1, 2020Inventors: Albert M. Wu, John David Brazzle, Zafer Kutlu
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Publication number: 20190141834Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module. A method of making a component-on-package circuit may include attaching a component for an electrical circuit to a circuit module. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component after the attachment both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides a spring-like cushioning of force applied to the component in the direction of the circuit module.Type: ApplicationFiled: April 11, 2017Publication date: May 9, 2019Inventors: John David Brazzle, Frederick E. Beville, David A. Pruitt
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Publication number: 20170311447Abstract: A component-on-package circuit may include a component for an electrical circuit and a circuit module attached to the component. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides spring-like cushioning of force applied to the component in the direction of the circuit module. A method of making a component-on-package circuit may include attaching a component for an electrical circuit to a circuit module. The circuit module may have circuitry and at least one leadframe which connects the circuitry to the component after the attachment both electrically and thermally. The leadframe may have a high degree of both electrical and thermal conductivity and a non-planar shape that provides a spring-like cushioning of force applied to the component in the direction of the circuit module.Type: ApplicationFiled: April 24, 2017Publication date: October 26, 2017Inventors: John David BRAZZLE, Frederick E. BEVILLE, David A. PRUITT
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Patent number: 7015780Abstract: A monolithic or dual monolithic magnetic device or apparatus having an array of formations such as protruding or raised nubs wherein adjacent nubs have the same or opposite polarity to produce a high magnetic field gradient in the vicinity of the nubs is described. In lieu of nubs, the use of a magnetic device with thru-holes, blind holes, filled holes, or iron flux concentrators is also detailed, wherein all embodiments result in regions of high magnetic field gradient. Apparatus and methods for spot-poling a magnet array are also illustrated. An application of an array of MEMS actuators using the magnets of the present invention to produce high field gradient at precise locations is described. A further application of a biochemical separation unit containing a magnetic array and micro-fluidic channels for separating out magnetic particles tagged with bio-specific molecules for sensing the presence of a disease or specified chemicals is also described.Type: GrantFiled: June 25, 2002Date of Patent: March 21, 2006Assignee: Corning IncorporatedInventors: Jonathan Jay Bernstein, William Patrick Taylor, John David Brazzle, Christopher John Corcoran, James Kelly Lee
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Publication number: 20030234711Abstract: A monolithic or dual monolithic magnetic device or apparatus having an array of formations such as protruding or raised nubs wherein adjacent nubs have the same or opposite polarity to produce a high magnetic field gradient in the vicinity of the nubs is described. In lieu of nubs, the use of a magnetic device with thru-holes, blind holes, filled holes, or iron flux concentrators is also detailed, wherein all embodiments result in regions of high magnetic field gradient. Apparatus and methods for spot-poling a magnet array are also illustrated.Type: ApplicationFiled: June 25, 2002Publication date: December 25, 2003Inventors: Jonathan Jay Bernstein, William Patrick Taylor, John David Brazzle, Christopher John Corcoran, James Kelly Lee