Abstract: A method is for making an integrated circuit on a semiconductor wafer, where the integrated circuit includes circuit features having a desired, relatively small, critical dimension. The method preferably comprises the steps of: designing a reticle including pattern features having a critical dimension to form corresponding circuit features based upon overlap areas defined by a plurality of exposure steps with a shift therebetween so that the circuit features have the desired, relatively small, critical dimension. The designing step preferably includes determining a scaling factor function for relating the critical dimension of the pattern features and the shift to the desired critical dimension of the circuit features and while taking into account that the scaling factor function is also a function of the shift. The method preferably includes steps of fabricating the reticle and using the reticle to make the integrated circuit on the semiconductor wafer based on the plurality of exposure steps.

Abstract: A method and controller for controlling a process and system for patterning a feature in a photoresist on a semiconductor wafer. The present invention characterizes various components (both individually and collectively) of an image transfer system, including the illumination source, lens and product reticle, with regard to dimensional errors introduced into the image transfer process by these components. The collective error data or information provided in accordance with the present invention may be communicated to the image transfer system to control the image transfer system and the image transfer process and to ensure that the actual dimension of features patterned in the photoresist are within acceptable dimensional limits for these features.

Abstract: An improved method of integrated circuit fabrication is described with a photolithographic step involving pattern decomposition. A desired final pattern is decomposed into two or more component patterns for photoresist imaging, leading to improvements in image fidelity.

Abstract: Linewidth control features having integral transistors are disclosed. Optical and electrical measurements of the linewidth control feature and its associated transistor may be correlated thereby providing a method of improving production processes.

Abstract: Very rapid and accurate linewidth measurements in selected subregions of an LSI mask or wafer are made by means of a low-cost apparatus. The apparatus embodies the recognition that an accurate linewidth determination can be made for any particular feature among a variety of features in a repeated array by a calibrated and normalized measurement of the average light transmission or reflection of a subregion that includes the feature. In turn, the measurement is automatically converted to a linewidth reading by analog computing circuitry.

Abstract: In an optical comparison inspection system a single beam from a scanning light source is split to produce a pair of synchronously scanning focused light beams. One of the beams is directed onto a reference, light affecting patterned workpiece and the other beam is directed onto a similar patterned workpiece to be inspected. Both workpieces are mounted in optically equivalent positions on a traverse table which has a direction of travel orthogonal to parallel planes containing the scanning light beams. Pattern differences are represented by differences in photodetected representations of the two light beams, which are intensity modulated by the patterned workpieces. By electronically gating preselected combinations of the two modulated signals with circuitry employing multiple threshold detection elements, a resultant signal is produced which enables allowable edge aberrations to be discriminated from unacceptable defects in the patterns.