Patents by Inventor John Deegan

John Deegan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9619155
    Abstract: Data address management systems, methods, devices and uses for minimizing interaction with data consumers' data on data storage devices, an embodiment comprising an external bus for communicatively interfacing the data storage system and data consumers; at least one storage medium components, each storage medium component comprising a plurality of storage locations having a unique storage location indicators; a translation layer module comprising a data address space having data addresses associable with storage location indicators; and a controller configured to store data in the storage locations and creating associations in the translation layer module between data addresses and the physical location indicators; wherein the data address space is accessible by the data consumer for addressing requests relating to data stored on the storage device and wherein the controller is configured to manipulate the arrangement of the data addresses in the data address space.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 11, 2017
    Assignee: Coho Data Inc.
    Inventors: Andrew Warfield, Timothy John Deegan, Keir Fraser, Daniel Stodden, Kevin Jamieson
  • Publication number: 20160323237
    Abstract: Systems, methods and devices for distributed memory management comprising a network component configured for network communication with one or more memory resources that store data and one or more consumer devices that use data, the network component comprising a switching device in operative communication with a mapping resource, wherein the mapping resource is configured to associate mappings between data addresses associated with memory requests from a consumer device relating to a data object and information relating to a storage location in the one or more memory resources associated with the data from the data object, wherein each data address has contained therein identification information for identifying the data from the data object associated with that data address; and the switching device is configured to route memory requests based on the mappings.
    Type: Application
    Filed: July 8, 2016
    Publication date: November 3, 2016
    Inventors: Andrew Warfield, Jacob Taylor Wires, Daniel Stodden, Dutch Meyer, Jean Maurice Guy Guyader, Keir Fraser, Timothy John Deegan, Brendan Anthony Cully, Christopher Clark, Kevin Jamieson, Geoffrey Lefebvre
  • Patent number: 9390055
    Abstract: Systems, methods and devices for distributed memory management comprising a network component configured for network communication with one or more memory resources that store data and one or more consumer devices that use data, the network component comprising a switching device in operative communication with a mapping resource, wherein the mapping resource is configured to associate mappings between data addresses associated with memory requests from a consumer device relating to a data object and information relating to a storage location in the one or more memory resources associated with the data from the data object, wherein each data address has contained therein identification information for identifying the data from the data object associated with that data address; and the switching device is configured to route memory requests based on the mappings.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: July 12, 2016
    Assignee: Coho Data, Inc.
    Inventors: Andrew Warfield, Jacob Taylor Wires, Daniel Stodden, Dutch Meyer, Jean Maurice Guy Guyader, Keir Fraser, Timothy John Deegan, Brendan Anthony Cully, Christopher Clark, Kevin Jamieson, Geoffrey Lefebvre
  • Publication number: 20150227316
    Abstract: Data address management systems, methods, devices and uses for minimizing interaction with data consumers' data on data storage devices, an embodiment comprising an external bus for communicatively interfacing the data storage system and data consumers; at least one storage medium components, each storage medium component comprising a plurality of storage locations having a unique storage location indicators; a translation layer module comprising a data address space having data addresses associable with storage location indicators; and a controller configured to store data in the storage locations and creating associations in the translation layer module between data addresses and the physical location indicators; wherein the data address space is accessible by the data consumer for addressing requests relating to data stored on the storage device and wherein the controller is configured to manipulate the arrangement of the data addresses in the data address space.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 13, 2015
    Inventors: Andrew Warfield, Timothy John Deegan, Keir Fraser, Daniel Stodden, Kevin Jamieson
  • Publication number: 20140025770
    Abstract: Systems, methods and devices for distributed memory management comprising a network component configured for network communication with one or more memory resources that store data and one or more consumer devices that use data, the network component comprising a switching device in operative communication with a mapping resource, wherein the mapping resource is configured to associate mappings between data addresses associated with memory requests from a consumer device relating to a data object and information relating to a storage location in the one or more memory resources associated with the data from the data object, wherein each data address has contained therein identification information for identifying the data from the data object associated with that data address; and the switching device is configured to route memory requests based on the mappings.
    Type: Application
    Filed: May 9, 2013
    Publication date: January 23, 2014
    Applicant: Convergent.io Technologies Inc.
    Inventors: Andrew Warfield, Jacob Taylor Wires, Daniel Stodden, Dutch Meyer, Jean Maurice Guy Guyader, Keir Fraser, Timothy John Deegan, Brendan Anthony Cully, Christopher Clark, Kevin Jamieson, Geoffrey Levebvre
  • Publication number: 20130282994
    Abstract: Systems, methods and devices for management of instances of virtual memory components for storing computer readable information for use by at least one first computing device, the system comprising at least one physical computing device, each physical computing device being communicatively coupled over a network and comprising: a physical memory component, a computing processor component, an operating system, a virtual machine monitor, and virtual memory storage appliances; at least one of the virtual memory storage appliances being configured to (a) accept memory instructions from the at least one first computing device, (b) instantiate instances of at least one virtual memory component, (c) allocate memory resources from at least one physical memory component for use by any one of the least one virtual memory components, optionally according to a pre-defined policy; and (d) implement memory instructions on the at least one physical memory component.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 24, 2013
    Inventors: Jacob Taylor Wires, Andrew Warfield, Daniel Stodden, Dutch Meyer, Jean Maurice Guy Guyader, Keir Fraser, Timothy John Deegan, Brendan Anthony Cully, Christopher Clark, Mohammad Abdul-Amir
  • Publication number: 20050114750
    Abstract: A memory subsystem comprising: a command register in operable communication with a plurality of memory devices via a plurality of command buses. The plurality of memory devices is arranged into symbol slices and each symbol slice is configured to be part of a single error correction code packet. Each command bus of the plurality of command buses is configured to interface between the command register and each memory device in a particular symbol slice. A method of command bus redundancy comprising: configuring a plurality of memory devices into symbol slices, each symbol slice configured to be part of a single error correction code packet; establishing a plurality of command buses, each command bus configured to interface with each memory device in a particular symbol slice; and configuring a command register with sufficient command bus drivers to support each command bus of the plurality of command buses.
    Type: Application
    Filed: November 25, 2003
    Publication date: May 26, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John Deegan, Kevin Gower