Patents by Inventor John Dejaco

John Dejaco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030218478
    Abstract: Pullup and/or pulldown transistors are electrically connected to the output of MTCMOS logic gates. The use of a pullup transistor pulls up the output to a known, non-floating voltage level when the circuit enters a sleep mode (e.g. the high voltage threshold headswitch and/or footswitch are de-asserted) eliminating crowbar current from being drawn by connected circuits having neither footswitches nor headswitches. Likewise, when a pulldown transistor is electrically connected to the output of the MTCMOS logic gates, the output is pulled down to ground, or other reference level, when the circuit is in a sleep mode. As a result of the addition of a pullup or pulldown transistor on the output of the logic gates, the output is pulled to a known, non-floating voltage level, and the drawing of crowbar current from components that are electrically connected to the output of the logic gates is prevented.
    Type: Application
    Filed: May 24, 2002
    Publication date: November 27, 2003
    Inventors: Mehdi Hamidi Sani, Gregory A. Uvieghara, John Dejaco