Patents by Inventor John Ducyao BELERAN

John Ducyao BELERAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor packages and methods for forming semiconductor package
    Patent number: 10381280
    Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: August 13, 2019
    Assignee: UTAC HEADQUARTERS PTE. LTD.
    Inventors: Nathapong Suthiwongsunthorn, John Ducyao Beleran, Serafin Padilla Pedron, Jr.
  • SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING SEMICONDUCTOR PACKAGE
    Publication number: 20170294401
    Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.
    Type: Application
    Filed: April 3, 2017
    Publication date: October 12, 2017
    Inventors: Nathapong SUTHIWONGSUNTHORN, John Ducyao BELERAN, Serafin Padilla PEDRON, JR.
  • Semiconductor packages and methods for forming semiconductor package
    Patent number: 9613877
    Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: April 4, 2017
    Assignee: UTAC HEADQUARTERS PTE. LTD.
    Inventors: Nathapong Suthiwongsunthorn, John Ducyao Beleran, Serafin Padilla Pedron, Jr.
  • SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING SEMICONDUCTOR PACKAGE
    Publication number: 20150102478
    Abstract: Semiconductor packages and methods for forming a semiconductor package are presented. The semiconductor package includes a package substrate having a die region on a first surface thereof. The package includes a die having a sensing element. The die is disposed in the die region and is electrically coupled to contact pads disposed on the first surface of the package substrate by insulated wire bonds. A cap is disposed over the first surface of the package substrate. The cap and the first surface of the package substrate define an inner cavity which accommodates the die and the insulated wire bonds. The insulated wire bonds are directly exposed to an environment through at least one access port of the package.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 16, 2015
    Applicant: United Test and Assembly Center Ltd.
    Inventors: Nathapong SUTHIWONGSUNTHORN, John Ducyao BELERAN, Serafin Padilla PEDRON, JR.