Abstract: This interposer provides interconnections between stacked layers of circuits, which may include integrated circuits, PC boards, and hybrid substrates. Fabricated as an integrated circuit itself using readily available process steps, this interposer uses single and dual-damascene layers to increase the density of usable interconnections on both its top and bottom surfaces. Access from a top surface to a bottom surface is provided by conductive through-vias that may be placed at a high density. For even greater density, interconnections may be routed within silicon trenches, while damascene processing reduces the total number of steps required for fabrication. The described techniques may be used to create double-sided integrated circuits.

Abstract: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of the source, drain and gate and its corresponding terminal. The others of the source, drain and gate are directly connected to their corresponding terminals. The nanotube switching element is electromechanically-deflectable in response to electrical stimulation at two control terminals to create one of a non-volatile open and non-volatile closed electrical communication state between the one of the source, drain and gate and its corresponding terminal.

Abstract: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of the source, drain and gate and its corresponding terminal. The others of the source, drain and gate are directly connected to their corresponding terminals. The nanotube switching element is electromechanically-deflectable in response to electrical stimulation at two control terminals to create one of a non-volatile open and non-volatile closed electrical communication state between the one of the source, drain and gate and its corresponding terminal.

Abstract: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of the source, drain and gate and its corresponding terminal. The others of the source, drain and gate are directly connected to their corresponding terminals. The nanotube switching element is electromechanically-deflectable in response to electrical stimulation at two control terminals to create one of a non-volatile open and non-volatile closed electrical communication state between the one of the source, drain and gate and its corresponding terminal.

Abstract: A removable card for use with a mobile wireless communication device has a processor and a non-volatile memory, connected to the processor. The memory has programming code stored configured to be executed by the processor and is operable in one of two modes. In a first mode the card is connected to the device with the card storing information received wirelessly by the device from the Internet. In a second mode the card is connected to a network portal device, which is connected to the Internet, with the card storing information received through the network portal device from the Internet. In another embodiment, the removable card has electrical connections for connecting to a mobile wireless communicating device for use by a user to connect to the Internet. The memory has two portions: a first portion and a second portion with the partitioning being alterable. The processor restricts access to the first portion by the user, while grants access to the second portion to the user.

Abstract: Non-volatile field effect devices and circuits using same. A non-volatile field effect device includes a source, drain and gate with a field-modulatable channel between the source and drain. Each of the source, drain, and gate have a corresponding terminal. An electromechanically-deflectable, nanotube switching element is electrically positioned between one of the source, drain and gate and its corresponding terminal. The others of the source, drain and gate are directly connected to their corresponding terminals. The nanotube switching element is electromechanically-deflectable in response to electrical stimulation at two control terminals to create one of a non-volatile open and non-volatile closed electrical communication state between the one of the source, drain and gate and its corresponding terminal. Under one embodiment, one of the two control terminals has a dielectric surface for contact with the nanotube switching element when creating a non-volatile open state.

Abstract: Deposited dielectric layers for a semiconductor device are typically formed in a chemical vapor deposition. Often a hydrogen by-product is formed. Especially in a plasma enhanced chemical vapor deposition process, the hydrogen by-product can form free radicals that are introduced into the dielectric layers. The hydrogen free radicals can affect the stability of the threshold and breakdown voltage of MOSFET transistors. Deuterium introduced into the CVD chamber competes to enter the dielectric layer with the hydrogen. The deuterium prevents some of the hydrogen free radicals from entering the dielectric layer and thus increases MOSFET reliability.

Abstract: A layout architecture for a programmable logic device comprising one or more adjacent metal lines, a first circuit, and a second circuit. The one or more adjacent metal lines may each comprise a critical path. The first circuit may be configured to present an input signal to each of the one or more adjacent metal lines in response to a configuration signal. The second circuit may be configured to (i) receive a signal from at least one of the one or more adjacent metal lines selected in response to the configuration signal and (ii) generate an output signal in response to the received signal.

Abstract: Deposited dielectric layers for a semiconductor device are typically formed in a chemical vapor deposition. Often a hydrogen by-product is formed. Especially in a plasma enhanced chemical vapor deposition process, the hydrogen by-product can form free radicals that are introduced into the dielectric layers. The hydrogen free radicals can affect the stability of the threshold and breakdown voltage of MOSFET transistors. Deuterium introduced into the CVD chamber competes to enter the dielectric layer with the hydrogen. The deuterium prevents some of the hydrogen free radicals from entering the dielectric layer and thus increases MOSFET reliability.

Abstract: The present invention provides a method of forming a high quality thin oxide on a semiconductor body. A sacrificial oxide is formed on the semiconductor and then etched to eliminate the surface contamination of the semiconductor body. Then, an EEPROM oxide is formed following by an arsenic implant. Next the EEPROM oxide on the semiconductor body is then prepared by thin oxide growth. The thin oxide is preferably formed in a steam ambient. Subsequently, the oxide is annealed under nitrous oxide ambient using a combination of in-situ and RTP annealing process.

Abstract: The improvement of thin tunnel oxides used in EEPROM and FLASH tecnologies using post-oxidation annealing in nitrogen causes defects in subsequent oxide films. These are manifested by oxide thinning at the bird's beak and result in high gate leakage. As the time and temperature to the post-oxidation annealing are increased for improved tunnel oxide performance, the number of defects increases rapidly. A method of realizing the improved tunnel oxide Q.sub.BD using higher post-oxidation time and temperature annealing while at the same time not degrading the quality of subsequent gate oxides is shown. The use of sacrificial oxidation and strip just prior to the transistor gate oxidation is described. This process removes the additional nitride which exists at the field edges, leading to the oxide thinning. As a result, improved tunnel oxide integrity can be achieved without degradation of high and low voltage transistors.

Abstract: Deposited dielectric layers for a semiconductor device are typically formed in a chemical vapor deposition. Often a hydrogen by-product is formed. Especially in a plasma enhanced chemical vapor deposition process, the hydrogen by-product can form free radicals that are introduced into the dielectric layers. The hydrogen free radicals can affect the stability of the threshold and breakdown voltage of MOSFET transistors. Deuterium introduced into the CVD chamber competes to enter the dielectric layer with the hydrogen. The deuterium prevents some of the hydrogen free radicals from entering the dielectric layer and thus increases MOSFET reliability.

Abstract: In a light phase grating device, by forming the beam with a bottom conductive layer, the beam will not stick to the conductive layer on the substrate. The triboelectric effect will not occur, because the bottom conductive layer of the beam will allow charges to dissipate.

Abstract: An incinerator (200)is provided for burning combustible refuse (16) in a primary combustion chamber (2) that has an outlet (50) for exhaust heat (30) and an inlet (28) for receiving refuse (16) and an inlet (36) for receiving a mixture of pressurized oxygen and pressurized hydrogen at respective rates correlated to create a burn temperature within chamber (2) of at least 4000.degree. F. to provide exhaust heat that is more environmentally acceptable.

Abstract: A method is disclosed for fabricating submicron silicon gate metal-oxide-semiconductor field effect transistors (MOSFETs) which have threshold and punchthrough implants that are self-aligned to the gate electrode and source and drain regions. A layer of dielectric material (12) is either deposited or grown on the surface of a substrate, and a trench (15), which defines the region of the MOSFET gate electrode, is formed in the dielectric layer. A gate oxide (16) is formed at the exposed substrate at the bottom of the trench, and an implant is performed into the silicon substrate wherever there is gate oxide, but not into the portion of the substrate covered by the original dielectric layer. A layer of polysilicon (20), preferably doped, or another metallic film is then deposited onto the surface. The polysilicon is etched back to the top surface of the dielectric layer, thereby leaving polysilicon in the trench to form the gate electrode (24).

Abstract: Metal contacts and interconnections for semiconductor integrated circuits are fabricated through the deposition of a sandwich structure of metal. The bottom layer of a refractory metal prevents aluminum spiking into silicon; the top layer of refractory metal or alloy serves to reduce hillocking of the middle layer of conductive material. The upper layer of refractory metal at the location of the contact pads is etched off to improve bonding during packaging.