Patents by Inventor John E. Herczeg

John E. Herczeg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080148208
    Abstract: Techniques for automating test pad insertion in a printed circuit board (PCB) design and fixture probes insertion in a PCB tester fixture are presented. A probe location algorithm predictably determines respective preferred probing locations from among respective sets of potential probing locations associated with a number of respective nets in a PCB design. Test pads, preferably in the form of bead probes, are added to the PCB design at the respective preferred probing locations along with, where feasible, one or more alternate probing locations chosen from among remaining ones of the respective sets of potential probing locations. During fixture design, nets with multiple test pads implemented in the PCB design are processed by the same probe location algorithm used during PCB design to determine the associated preferred probing location and any associated alternate probing locations for said respective nets.
    Type: Application
    Filed: January 22, 2008
    Publication date: June 19, 2008
    Inventors: Chris R. Jacobsen, Kenneth P. Parker, John E. Herczeg
  • Patent number: 7187165
    Abstract: Techniques for automating test pad insertion in a printed circuit board (PCB) design and fixture probe insertion in a PCB tester fixture are presented. A probe location algorithm predictably determines respective preferred probing locations from among respective sets of potential probing locations associated with a number of respective nets in a PCB design. Test pads, preferably in the form of bead probes, are added to the PCB design at the respective preferred probing locations along with, where feasible, one or more alternate probing locations chosen from among remaining ones of the respective sets of potential probing locations. During fixture design, nets with multiple test pads implemented in the PCB design are processed by the same probe location algorithm used during PCB design to determine the associated preferred and alternate probing locations for said respective nets.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: March 6, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Chris R. Jacobsen, Kenneth P. Parker, John E. Herczeg