Abstract: A multi-chip module is provided including a multiplier configured to multiply a frequency of an input signal into a predetermined Ka-band frequency center channel, a modulator configured to modulate the center channel, and an amplifier configured to amplify a modulated signal for output.

Abstract: A multi-chip module is provided including a multiplier configured to multiply a frequency of an input signal into a predetermined Ka-band frequency center channel, a modulator configured to modulate the center channel, and an amplifier configured to amplify a modulated signal for output.

Abstract: A radio frequency integrated circuit (and method of making) for enhancing wireless communication and/or sensing systems comprising a base comprising a gallium arsenide (GaAs) substrate; a binary phase shift keying modulator fabricated on the base; a power amplifier fabricated on the base and operatively associated with the binary phase shift keying modulator; the power amplifier having a first shunt operatively associated therewith; a transmit/receive switch fabricated on the base, the transmit/receive switch being operatively associated with the power amplifier and being alternately connectable to an antenna port adapted to be connected to an antenna; a low noise amplifier fabricated on the base; the low noise amplifier being alternately connectable to the antenna port, the low noise amplifier having a second shunt operatively associated therewith; the circuit operating in a transmit stage in which the power amplifier is connected to the antenna port and in a receive stage in which the low noise amplifier is

Abstract: A broadband, 4-bit MMIC phase shifter for use in a phased array antenna is provided. The four bit selectable phase shifter for use in a phased array antenna of the present invention, which selectably causes an input signal to be shifted in phase, includes a first bit for selectively providing a 180° phase shift, wherein the first bit is a line/reflected bit; a second bit for selectively providing a 90° phase shift, wherein the second bit is a reflected bit; a third bit for selectively providing a 45° phase shift, wherein the third bit is a reflected bit; and a fourth bit for selectively providing a 22.5° phase shift, wherein the fourth bit is a high pass/low pass bit. The phase shifter of the present invention is compact, broadband and has good insertion loss and balance, yet uses a standard 0.25 mm PHEMT process with standard bias voltages.

Abstract: A method and apparatus for obtaining measurements, on a spacecraft that employs a transceiver, at intervals that are shorter than the telemetry frame duration for use in correcting ground-based Doppler measurements so as to remove the effects of drift in the spacecraft oscillator frequency reference. Samples of navigation counters on the spacecraft that supply information that may be used to compare the uplink frequency with the downlink frequency at the spacecraft are triggered at intervals that are shorter than the duration of a telemetry frame; the samples are then included in a telemetry frame and are time tagged after they are received on the ground; the time tagged samples are then used to calculate precise two-way Doppler measurements.

Abstract: A method and apparatus for obtaining measurements, on a spacecraft that employs a transceiver, at intervals that are shorter than the telemetry frame duration for use in correcting ground-based Doppler measurements so as to remove the effects of drift in the spacecraft oscillator frequency reference. Samples of navigation counters on the spacecraft that supply information that may be used to compare the uplink frequency with the downlink frequency at the spacecraft are triggered at intervals that are shorter than the duration of a telemetry frame; the samples are then included in a telemetry frame and are time tagged after they are received on the ground; the time tagged samples are then used to calculate precise two-way Doppler measurements.

Abstract: A broadband, 4-bit MMIC phase shifter for use in a phased array antenna is provided. The four bit selectable phase shifter for use in a phased array antenna of the present invention, which selectably causes an input signal to be shifted in phase, includes a first bit for selectively providing a 180° phase shift, wherein the first bit is a line/reflected bit; a second bit for selectively providing a 90° phase shift, wherein the second bit is a reflected bit; a third bit for selectively providing a 45° phase shift, wherein the third bit is a reflected bit; and a fourth bit for selectively providing a 22.5° phase shift, wherein the fourth bit is a high pass/low pass bit. The phase shifter of the present invention is compact, broadband and has good insertion loss and balance, yet uses a standard 0.25 mm PHEMT process with standard bias voltages.

Abstract: The invention concerns a Guild array multiplier for two's complement notation. Three major cell types are used as building blocks in the array, the cells differing by a simple carry circuit only.