Abstract: Systems, apparatuses, and methods are provided herein related to irrigation control systems. In some embodiments, an irrigation control system includes a router, an access point, and irrigation controller, a wireless adapter, and a mobile device. The mobile device can communicate with the wireless adapter in a direct communication mode in which the wireless adapter creates a wireless network, a first indirect communication mode in which the mobile device and the wireless adapter communicate via the access point while the mobile device is within range of the access point, and a second indirect communication mode in which the mobile device and the wireless adapter communicate via the access point while the mobile device is out of range of the access point.

Abstract: Combinational logic circuits are implemented with Inverter Function Logic gates. Such circuits may utilize the logical complement of an input signal in the logical operation performed by the gate without having to use a separate inverter stage or a dual level Cascode arrangement. If such circuits employ the feature of collector dotting, diode clamps are not required. Combinational logic circuits fabricated with Inverter Function Logic utilize a level shifted transistor means in lieu of the standard reference transistor of ECL gates so that input voltages are compared with each other rather than with a reference voltage. In one embodiment the level shifted transistor means comprises a transistor having a level shifted representation of an input signal whose complement is to be used in the logical operation applied to its base.

Abstract: Sequential logic circuits are implemented with inverter function logic gates. In each circuit, level shifted transistor means are utilized in place of the standard reference transistors found in ECL gate circuits so that the complement of at least one of the input signals may be included in the logical operation performed by the sequential logic circuit. The complementary clock signal is thus not required as a separate input. Sequential logic functions thus implemented have fewer gates, less complex clock drivers, consume less power and have shorter propagation delay.

Abstract: A bipolar logic gate is provided which will perform logical operations involving the complement of one or more input signals. The gate resembles the conventional ECL OR/NOR gate circuit except that a level shift input transistor is substituted for the standard reference transistor and shifts the voltage level of the input signal whose complement is to be included in the logical operation. A voltage shift of about -0.4 volts occurs either at the base or on the emitter of the level shift input transistor. As a consequence of the voltage shift and subsequent comparison with unshifted voltages, the input voltages are compared with each other rather than with a reference voltage, V.sub.BB. Logically, the complement of the input is included in the OR'd and NOR'd outputs provided on the output lines. The logic gate may be incorporated in combinational and sequential logic circuits.

Abstract: An emitter coupled logic gate incorporating an active pull-down transistor in the pull-down circuit with bias connections for the pull-down transistor including components in the differential input circuit of the gate so that the pull-down transistor is active only during a HIGH-to-LOW transition of the output logic signal. Single and plural input gates are described together with advantageous exemplary embodiments of integrated circuits utilizing active pull-down ECL gates formed on an IC chip to enable large signal fan-out to other circuits formed on the same IC chip or to off-chip utilization circuits.

Abstract: A findings structure for maintaining a spool and a bobbin with like filaments thereon in assembled relationship. The spool and bobbin are each provided with axial bores for support of each on a spindle for the use of each, and they are maintained in assembled relationship for storage by means extending into the aligned bores, such means having resilient filamentous material extending therefrom gripping the sides of said aligned bores. The assemblies of the bobbins and spools may be joined by a flexible strand for ready selection and storage as a group of assembled units.

Abstract: A detector mechanism and system for currency dispensers for automatic banking equipment which senses the presence of multiple or double bills, called "doubles," at any bill location in a series of bills intended to be fed one by one in a path of travel from a supply of bills to a place of delivery to a customer. The bill thickness of each bill is gauged continuously while moving in the path of travel, and the thickness measurements are time averaged over substantially the entire length of the gauged portion of the bill. The averaged and normal bill thicknesses are compared to determine if the averaged thickness is greater than the normal thickness by a predetermined amount. A greater thickness determination generates a signal of the presence of doubles, and the signal actuates means to reject the doubles while moving in the path of travel before delivery of the doubles to a customer.