Patents by Inventor John E. Schmiesing

John E. Schmiesing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming an integrated CMOS capacitive pressure sensor
    Patent number: 6472243
    Abstract: A capacitive pressure sensor (10) utilizes a diaphragm (38) that is formed along with forming gates (56,57) of active devices on the same semiconductor substrate (11).
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: October 29, 2002
    Assignee: Motorola, Inc.
    Inventors: Bishnu P. Gogoi, David J. Monk, David W. Odle, Kevin D. Neumann, Donald L. Hughes, Jr., John E. Schmiesing, Andrew C. McNeil, Richard J. August
  • Integrated CMOS capacitive pressure sensor
    Publication number: 20020072144
    Abstract: A capacitive pressure sensor (10) utilizes a diaphragm (38) that is formed along with forming gates (56,57) of active devices on the same semiconductor substrate (11).
    Type: Application
    Filed: December 11, 2000
    Publication date: June 13, 2002
    Inventors: Bishnu P. Gogoi, David J. Monk, David W. Odle, Kevin D. Neumann, Donald L. Hughes, John E. Schmiesing, Andrew C. McNeil, Richard J. August
  • Sensor and method of use
    Patent number: 6318174
    Abstract: A sensor has an electrode (120) that is movable along three mutually perpendicular axes (10, 11, 12). The sensor also has stationary over-travel limiting structures that restrict the movement of the electrode (120) along the three axes (10, 11, 12).
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: November 20, 2001
    Assignee: Motorola, Inc
    Inventors: John E. Schmiesing, Guang X. Li, Juergen A. Foerstner, Muh-Ling Ger, Paul L. Bergstrom, Frank A. Shemansky, Jr.
  • Sensor and method of use
    Patent number: 6105428
    Abstract: A sensor has an electrode (120) that is movable along three mutually perpendicular axes (10, 11, 12). The sensor also has stationary over-travel limiting structures that restrict the movement of the electrode (120) along the three axes (10, 11, 12).
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: August 22, 2000
    Assignee: Motorola, Inc.
    Inventors: John E. Schmiesing, Guang X. Li, Juergen A. Foerstner, Muh-Ling Ger, Paul L. Bergstrom, Frank A. Shemansky, Jr.
  • Electronic device enclosure including a conductive cap and substrate
    Patent number: 5545912
    Abstract: An enclosure (8) for an electronic device (26) such as, for example, an accelerometer. The enclosure (8) includes a conductive semiconductor substrate (12) underlying the electronic device (26), a conductive cap (16) overlying the electronic device (26), and a power supply (25) having one or more outputs (27, 29) each with a substantially fixed potential wherein one output is electrically coupled to the conductive semiconductor substrate (12) and another output to the conductive cap (16). In a preferred embodiment, substrate ( 12 ) and cap (16) are coupled to the same power supply output (27). This coupling substantially eliminates the adverse effects of parasitic capacitances of the substrate (12) and cap (16) to reduce measurement error and EMI when a capacitive accelerometer is used as the electronic device (26).
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: August 13, 1996
    Assignee: Motorola, Inc.
    Inventors: Ljubisa Ristic, Daniel N. Koury, John E. Schmiesing, Ronald J. Gutteridge, Henry G. Hughes
  • Complementary bipolar and CMOS on SOI
    Patent number: 5164326
    Abstract: A method for fabricating BiCMOS on SOI. An SOI wafer (14) with an oxide layer (17) and a nitride layer (16) has areas isolated by a LOCOS or mesa isolation (13). A region (15) is defined for CMOS structures from which the insulating layers (17,16) are removed. A gate oxide (21), a polycrystalline silicon layer (22), and a second insulating layer (23,24) is formed. A region for emitters (26) is defined and nitride deposited to form a spacer (27). An oxide layer (28) is grown over the polycrystalline silicon (22) within the emitter region (26). The wafer (14) is etched to the underlying monocrystalline silicon (18) forming base contacts (31). A polycrystalline silicon spacer (36) is formed from a second polycrystalline layer (43) and an oxide spacer (40) is deposited. A region for bipolar collectors (32) and CMOS areas (34) is defined and a spacer (38) deposited.
    Type: Grant
    Filed: March 30, 1992
    Date of Patent: November 17, 1992
    Assignee: Motorola, Inc.
    Inventors: Juergen A. Foerstner, Bor-Yuan Hwang, John E. Schmiesing