Patents by Inventor John Edward Cunningham

John Edward Cunningham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6485996
    Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: November 26, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Leo Maria Chirovsky, John Edward Cunningham, Keith Wayne Goossen, Sanghee Park Hui, Betty Jyue Tseng
  • Publication number: 20020094589
    Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 18, 2002
    Inventors: Leo Maria Chirovsky, John Edward Cunningham, Keith Wayne Goossen, Sanghee Park Hui, Betty Jyue Tseng
  • Patent number: 6258616
    Abstract: A semiconductor device having a buried doped layer of semiconductor material and a non-alloyed contact to the buried doped layer. The non-alloyed contact is made ohmic by the presence of an underlying delta-doped monolayer. The semiconductor device is made by placing a stop-etch layer on top of a buried doped layer and forming at least one delta-doped monolayer in either the stop-etch layer or the buried doped layer. Layers of semiconductor material disposed above the stop-etch layer are removed with an etchant to define an active region of the semiconductor device. The stop-etch layer prevents the etchant from removing the delta-doped monolayer. A non-alloyed metal film is then deposited over the delta-doped monolayer to form an ohmic contact to the buried doped layer.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: July 10, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen
  • Patent number: 6222206
    Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: April 24, 2001
    Assignee: Lucent Technologies INC
    Inventors: Leo Maria Chirovsky, John Edward Cunningham, Keith Wayne Goossen, Sanghee Park Hui, Betty Jyue Tseng
  • Patent number: 6141359
    Abstract: The present invention is an improved modelocked laser comprising an optical gain medium and an optical cavity including a self-tuning saturable reflector incorporating one or more quantum wells. In the improved laser, the self-tuning saturable reflector comprises a first Bragg grating having a reflection spectrum broader than the spectrum of desired lasing and an additional Bragg reflector for light in the spectral region of lasing to provide self-starting and stable operation without mechanical tuning. The Bragg reflectors are preferably semiconductor quarter wave reflector stacks, and the saturable absorber is one or more quantum wells within the outer stack. The invention also encompasses the new saturable reflector used in such lasers.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: October 31, 2000
    Assignee: Lucent Technologies, Inc.
    Inventors: John Edward Cunningham, Wayne Harvey Knox
  • Patent number: 5996221
    Abstract: A method for thermocompression bonding structures together including structures having different coefficients of thermal expansion, for example, thermocompression bonding optical diode arrays or other semiconductor structures to silicon substrates to form electronic or optoelectronic devices. The method includes aligning and contacting the structures to be interconnected, thermocompressing the structures via their contact pad elements at a bonding temperature, establishing an encapsulation temperature, applying an encapsulant material between the bonded structures, and curing the encapsulant material at the encapsulation temperature. Conventional bonding processes, which treat encapsulation as a separate step apart from bonding processes, melt the bonded assembly together and include at least one thermal cycle in which the bonded assembly is cooled to room temperature and then is re-heated to the encapsulation temperature before applying the encapsulant material.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: December 7, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Leo Maria Freishyn Chirovsky, John Edward Cunningham, Lucian Arthur D'Asaro, Keith Wayne Goossen
  • Patent number: 5940723
    Abstract: The specification describes a process for growing device quality III-V heteroepitaxial layers without the use of buffer layers, i.e. largely defect free layers with thicknesses greater than 50 Angstroms directly on the III-V substrate. These high quality heteroepitaxial layers are grown by low temperature MBE.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: August 17, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen
  • Patent number: 5872016
    Abstract: Optoelectronic devices such as photodetectors, modulators and lasers with improved optical properties are provided with an atomically smooth transition between the buried conductive layer and quantum-well-diode-containing intrinsic region of a p-i-n structure. The buried conductive layer is grown on an underlying substrate utilizing a surfactant-assisted growth technique. The dopant and dopant concentration are selected, as a function of the thickness of the conductive layer to be formed, so that a surface impurity concentration of from 0.1 to 1 monolayer of dopant atoms is provided. The presence of the impurities promotes atomic ordering at the interface between the conductive layer and the intrinsic region, and subsequently results in sharp barriers between the alternating layers comprising the quantum-well-diodes of the intrinsic layer.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: February 16, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen, William Young Jan, Michael D. Williams
  • Patent number: 5834792
    Abstract: The disclosed novel doping method makes it possible to tailor the effective activation energy of a dopant species in semiconductor material. The method involves formation of very thin layers of .delta.-doped second semiconductor material in first semiconductor material, with the second material chosen to have a bandgap energy that differs from that of the first material. Exemplarily, in a Be-doped GaAs/AlGaAs structure according to the invention the effective activation energy of the dopant was measured to be about 4 meV, and in conventionally Be-doped GaAs it was measured to be about 19 meV. The invention can be advantageously used to dope III-V and II-VI semiconductors. In some cases it may make possible effective doping of a semiconductor for which prior art techniques are not satisfactory.
    Type: Grant
    Filed: August 25, 1993
    Date of Patent: November 10, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Won-Tien Tsang
  • Patent number: 5735950
    Abstract: A process for manufacturing precise alloy compositions in nonlinear alloy systems. The invention implements a new quadratic fitting function that relates alloy composition c.sub.A for a variable A to input fluxes f.sub.A and f.sub.B, as c.sub.A =f.sub.A.sup.2 /(f.sub.A.sup.2 +/.beta.f.sub.B.sup.2). .beta. is a parameter that is used to modify the incorporation of the Group V input variable B. This modification is necessary because of different surface populations of Group V dimer species. This new fitting function precisely predicts alloy compositions in nonlinear systems, such as the GaAs.sub.l-y P.sub.y system, where y is set equal to the composition c.sub.A.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: April 7, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Keith Wayne Goossen
  • Patent number: 5701327
    Abstract: Low optical loss and simplified fabrication are achieved by a nonlinear reflector which incorporates one or more semiconductor quantum wells within an n half-wavelengths strain relief layer (where n is an odd integer greater than zero) that is formed on a standard semiconductor quarter wave stack reflector. Growth of the half-wavelength layer is controlled so that dislocations are formed in sufficient concentration at the interface region to act effectively as non-radiative recombination sources. After saturation, these recombination sources remove carriers in the quantum well before the next round trip of the optical pulse arrives in the laser cavity. The nonlinear reflector is suitable for laser modelocking at the high wavelengths associated with many currently contemplated telecommunications applications and provides, at such wavelengths, an intensity dependent response that permits it to be used for saturable absorption directly in a main oscillating cavity of a laser.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: December 23, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, William Young Jan, Wayne Harvey Knox, Sergio Tsuda