Patents by Inventor John Edward Florkey

John Edward Florkey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7763954
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having at least one metal wiring level within the substrate; an insulative layer on a surface of the substrate; an inductor within the insulative layer; and a wire bond pad within the insulative layer. The inductor and the wire bond pad are substantially co-planar. The inductor has a height greater than a height of the wire bond pad.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: July 27, 2010
    Assignee: International Business Machines Corporation
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Patent number: 7741698
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above a top surface of the substrate; an insulative layer on and above a top surface of the capping layer; an inductor comprising a first portion in and above the insulative layer and a second portion only above the insulative layer; and a wire bond pad within the insulative layer, wherein the first portion the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: June 22, 2010
    Assignee: International Business Machines Corporation
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Patent number: 7732294
    Abstract: A method of a semiconductor device. A substrate is provided. At least one metal wiring level is within the substrate. An insulative layer is deposited on a surface of the substrate. An inductor is formed within the insulative layer using a patterned plate process. A wire bond pad is formed within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Patent number: 7732295
    Abstract: A method of forming a semiconductor substrate. A substrate is provided. At least one metal wiring level is within the substrate. A first insulative layer is deposited on a surface of the substrate. A portion of a wire bond pad is formed within the first insulative layer. A second insulative layer is deposited on the first insulative layer. An inductor is within the second insulative layer using a patterned plate process. A remaining portion of the wire bond pad is formed within the second insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Patent number: 7573117
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above the substrate; an insulative layer on and above the capping layer; a first layer of photo-imagable material on and above the insulative layer; a layer of oxide on and above the first layer of photo-imagable material; a second layer of photo-imagable material on and above the layer of oxide; an inductor; and a wire bond pad. A first portion of the inductor is in the second layer of photo-imagable material, the layer of oxide, the first layer of photo-imagable material, the insulative layer, and the capping layer. A second portion of the inductor is in only the second layer of photo-imagable material. The wire bond pad in only the first layer of photo-imagable material, the insulative layer, and the capping layer.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: August 11, 2009
    Assignee: International Business Machines Corporation
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Publication number: 20080290458
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having at least one metal wiring level within the substrate; an insulative layer on a surface of the substrate; an inductor within the insulative layer; and a wire bond pad within the insulative layer. The inductor and the wire bond pad are substantially co-planar. The inductor has a height greater than a height of the wire bond pad.
    Type: Application
    Filed: July 10, 2008
    Publication date: November 27, 2008
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Publication number: 20080293210
    Abstract: A method of forming a semiconductor substrate. A substrate is provided. At least one metal wiring level is within the substrate. A first insulative layer is deposited on a surface of the substrate. A portion of a wire bond pad is formed within the first insulative layer. A second insulative layer is deposited on the first insulative layer. An iductor is within the second insulative layer using a patterned plate process. A remaining portion of the wire bond pad is formed within the second insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
    Type: Application
    Filed: July 10, 2008
    Publication date: November 27, 2008
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Publication number: 20080293233
    Abstract: A method of a semiconductor device. A substrate is provided. At least one metal wiring level is within the substrate. An insulative layer is deposited on a surface of the substrate. An inductor is formed within the insulative layer using a patterned plate process. A wire bond pad is formed within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.
    Type: Application
    Filed: July 10, 2008
    Publication date: November 27, 2008
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Publication number: 20080277759
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above a top surface of the substrate; an insulative layer on and above a top surface of the capping layer; an inductor comprising a first portion in and above the insulative layer and a second portion only above the insulative layer; and a wire bond pad within the insulative layer, wherein the first portion the inductor has a height in a first direction greater than a height of the wire bond pad in the first direction, wherein the first direction is perpendicularly directed from the top surface of substrate toward the insulative layer.
    Type: Application
    Filed: July 16, 2008
    Publication date: November 13, 2008
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed
  • Publication number: 20080272458
    Abstract: A semiconductor structure. The semiconductor structure includes: a substrate having a metal wiring level within the substrate; a capping layer on and above the substrate; an insulative layer on and above the capping layer; a first layer of photo-imagable material on and above the insulative layer; a layer of oxide on and above the first layer of photo-imagable material; a second layer of photo-imagable material on and above the layer of oxide; an inductor; and a wire bond pad. A first portion of the inductor is in the second layer of photo-imagable material, the layer of oxide, the first layer of photo-imagable material, the insulative layer, and the capping layer. A second portion of the inductor is in only the second layer of photo-imagable material. The wire bond pad in only the first layer of photo-imagable material, the insulative layer, and the capping layer.
    Type: Application
    Filed: July 16, 2008
    Publication date: November 6, 2008
    Inventors: Anil Kumar Chinthakindi, Douglas Duane Coolbaugh, John Edward Florkey, Jeffrey Peter Gambino, Zhong-Xiang He, Anthony Kendall Stamper, Kunal Vaed