Patents by Inventor John Erickson

John Erickson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6807596
    Abstract: A system for removal and replacement of core I/O devices while the rest of the computer system is powered-up and operational. The system comprises a custom form-factor core I/O card that contains a plurality of I/O devices, including a processor for managing the card's I/O functions. A command is sent to an operating system, running on a system processor external to the core I/O card, that notifies the system to stop using, and de-configure, the hardware on the core I/O card. Once the OS receives this notification, an indication that the card is ready to be removed is sent to the user. The user then removes the card from its slot and inserts a replacement card into the same slot. The system software then discovers the I/O components on the core I/O card to determine what components are available, and then configures the new I/O device(s).
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: October 19, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael John Erickson, Daniel V. Zilavy, Bradley D. Winick, Paul J. Mantey
  • Publication number: 20040177242
    Abstract: Techniques are disclosed for resetting agents in a computer system without requiring the computer system, or partitions thereof, to be reset. In one embodiment, each agent in the system is associated with a corresponding partition. A reset signal directed to an agent is redirected to a reset type selector which determines whether the partition associated with the agent is in a run state (an “unsafe run state”) in which resetting the agent will cause the partition to crash. If the partition is in an unsafe run state, a soft reset is performed on the agent. Otherwise, a hard reset is performed on the agent. If performing a soft reset does not solve the problem that was the impetus for the reset signal, the partition may be brought into a safe run state before performing a hard reset on it.
    Type: Application
    Filed: March 5, 2003
    Publication date: September 9, 2004
    Inventors: Michael John Erickson, David L. Tharp, Daniel V. Zilavy
  • Publication number: 20040116977
    Abstract: A method for electrically stimulating an area in a spinal disc is presented. The method comprises implanting a lead with one or more electrodes in a placement site in or adjacent to one or more discs at any spinal level from cervical through lumbar, connecting the lead to a signal generator, and generating electrical stimulation pulses using the generator to stimulate targeted portions of the disc. Additionally, a system for relieving pain associated with a spinal disc is presented that comprises a lead with one or more electrodes, an introducer for introducing the lead to a placement site in or adjacent to the disc, a removable stylet for guiding the lead to the placement site in the disc, and a generator connected to the lead for generating electrical pulses to the lead for stimulating the disc.
    Type: Application
    Filed: December 13, 2002
    Publication date: June 17, 2004
    Inventors: Philip M. Finch, Scott F. Drees, John Erickson
  • Patent number: 6748276
    Abstract: A neuromodulation therapy system includes a programmer and a stimulation system. The stimulation system is capable of storing multiple data sets, each data set effecting an independent therapy. The stimulation system includes a display mechanism that can display certain imagery to distinguish visually one therapy from another therapy.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: June 8, 2004
    Assignee: Advanced Neuromodulation Systems, Inc.
    Inventors: Richard J. Daignault, Jr., Gerhard Deffner, Rob Egemo, John Erickson, Robert W. Fee
  • Publication number: 20040104742
    Abstract: An apparatus and method for indicating and allowing hot swapping of a circuit board. During both insertion and extraction of a circuit board from a system, two inputs signals are generated from staggered pins located on the circuit board's connector. The inputs are processed through a NAND function implemented with transistors and output to two Schmitt trigger inverters connected in series. The output of the series connection of Schmitt trigger inverters goes high when both input signals are high and goes low when one of the inputs signals goes low. In addition, through the use of a resistor, capacitor combination connected to the input of the first Schmitt trigger inverter, the output signal remains high for a period of time after one of the input signals goes low. This additional period of time prevents any damage or disruption of signaling caused by transient current and voltage fluctuations as a circuit board is inserted or extracted.
    Type: Application
    Filed: July 21, 2003
    Publication date: June 3, 2004
    Inventors: Michael John Erickson, Richard K. Brush
  • Publication number: 20040083076
    Abstract: A system for and method of evaluating a log. The system includes an analysis module having at least one input terminal connectable to the at least one input device. The at least one input terminal is operable to receive at least one signal representing at least one measured property of the log and at least one determined parameter of the log determined in response to an energy being applied to the log. The analysis module further includes a processor coupled to the at least one input terminal. The processor determines a predictive modulus of elasticity (MOE) of the log based at least in part on the at least one measured property and the at least one sensed parameter. The analysis module also includes an output terminal coupled to the processor and connectable to an output device. The output terminal transmits a third signal representing the predictive MOE.
    Type: Application
    Filed: July 24, 2003
    Publication date: April 29, 2004
    Inventors: Xiping Wang, Robert J Ross, James A Mattson, John Erickson, John W Forsman, Earl A Geske, Michael A Wehr
  • Publication number: 20040059315
    Abstract: The invention is directed to a dose control module for manipulating the dosage of one or more pharmaceutical solutions emanating from an implantable drug infusion pump. The dose control module has a processor and other circuitry for manipulating flow valves and other dose manipulators. Effluent catheters from one or more implantable drug infusion pumps may be connected to the dose control module. The dose control module may direct the effluent pharmaceutical solution to one or more catheters. These catheters direct the pharmaceutical solutions to treatment locations. The invention is also directed to induction coil valves for use in or with the dose control module. The use of induction coils permits the dose control module to determine valve position and counteract large directional magnetic fields produced by MRIs.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 25, 2004
    Inventors: John Erickson, Brian Blischak, Terry Daglow
  • Publication number: 20040055648
    Abstract: The invention is directed to a method and circuitry for controlling dosage rates of a treatment solution. An electric pulse is directed through a coil, inducing a magnetic field and causing a valve to open. A subsequent set of pulses is directed through the coil to maintain the position of the valve. Between pulses, the coil motivates current to flow. Energy associated with the current is captured in a collection circuitry. The method and circuitry may also interpret a signal induced in the coil by an externally applied magnetic field such as that produced by an MIR. The method and circuitry may provide an electric signal to counteract the externally applied magnetic field or to produce a degaussing field.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 25, 2004
    Inventor: John Erickson
  • Publication number: 20040055649
    Abstract: The invention is directed to a dose control apparatus for manipulating the dosage of one or more pharmaceutical solutions emanating from an implantable drug infusion pump. The dose control apparatus has a movable core that is held in a desired position by a magnet. The apparatus has at least one coil that, when activated, motivates the core to move to a new position. The core may be held in the second position by another magnet. The apparatus may have more that one coil provide various control options. In addition, the coils may be used to determine core position or the presence and strength of an externally applied magnetic field such as that produced in an MRI. The coils may also be used to produce a magnetic field counteracting the externally applied field or to produce a degaussing field.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 25, 2004
    Inventors: John Erickson, Terry Daglow
  • Publication number: 20040055652
    Abstract: The invention is directed to a dose control apparatus. The apparatus has two armatures pressed against a valve seat by at least one spring. A coil induces a magnetic field that motivates the armatures against the force of the spring, thereby opening the valve. The armatures may move along a common axis in opposite directions. The apparatus may also include a core located between the armatures and a casing about the coil. The core and casing act to guide the magnetic field, reducing the power requirements for creating the field. Current may be periodically reversed in the coil to provide a degaussing field. In addition, a signal may be produced by the coil in the presence an externally applied magnetic field such as an MRI. An opposing magnetic field may be produced by the coil or the current provided to the coil may be adjusted.
    Type: Application
    Filed: December 30, 2002
    Publication date: March 25, 2004
    Inventor: John Erickson
  • Publication number: 20040034842
    Abstract: Systems, methods and software products ensure correct connectivity between circuit designs. A list of connections of the circuit designs is generated. One or more mapping files are generated from the list to correlate connections between the circuit designs. The mapping file is regenerated in response to modification of at least one of the circuit designs.
    Type: Application
    Filed: August 19, 2003
    Publication date: February 19, 2004
    Inventors: Paul John Mantey, John S. Atkinson, Michael John Erickson
  • Publication number: 20040031012
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventors: Michael John Erickson, Paul J. Mantey, John S. Atkinson
  • Publication number: 20030195591
    Abstract: An electronic stimulation system is used to control pain over multiple regions of a patient's body. The system has one or more percutaneous leads, each having multiple electrodes, implanted within the patient's epidural space parallel to the axis of the spinal cord. The leads are connected to either a totally implanted system or a radio frequency system. The system is able to treat pain over different regions of a patient's body by “simultaneously” stimulating the patient with at least three different stimulation settings. “Simultaneous” stimulation involves sequentially stimulating the patient with the multiple stimulation settings such that the patient receives the cumulative effect of each stimulation setting, while not perceiving the transition from one stimulation setting to another.
    Type: Application
    Filed: May 23, 2003
    Publication date: October 16, 2003
    Inventors: Jay Law, Lance Ehren, George Van Campen, John Erickson
  • Patent number: 6629307
    Abstract: The system of the invention ensures pin assignments between system board connections of printed circuit boards. A plurality of software configuration files define connections of a plurality of printed circuit boards. A mapping file correlates pin assignment attributes between the software configuration files. A processing section processes the configuration files and the mapping file to generate board schematics for the plurality of printed circuit boards with common pin assignment for the connections of each of the printed circuit boards. The software configuration files may include symbol files representing parts within the plurality of printed circuit boards. The software configuration files may include geometry files representing physical attributes of the parts. Changes to the design are automatically correlated to pin assignments through the boards and layout.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: September 30, 2003
    Assignee: Hewlett-Packard Development Company, LP.
    Inventors: Michael John Erickson, Paul J. Mantey, John S Atkinson
  • Patent number: 6625681
    Abstract: An apparatus and method for indicating and allowing hot swapping of a circuit board. During both insertion and extraction of a circuit board from a system, two inputs signals are generated from staggered pins located on the circuit board's connector. The inputs are processed through a NAND function implemented with transistors and output to two Schmitt trigger inverters connected in series. The output of the series connection of Schmitt trigger inverters goes high when both input signals are high and goes low when one of the inputs signals goes low. In addition, through the use of a resistor, capacitor combination connected to the input of the first Schmitt trigger inverter, the output signal remains high for a period of time after one of the input signals goes low. This additional period of time prevents any damage or disruption of signaling caused by transient current and voltage fluctuations as a circuit board is inserted or extracted.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: September 23, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael John Erickson, Richard K. Brush
  • Patent number: 6609031
    Abstract: An electronic stimulation system is used to control pain over multiple regions of a patient's body. The system has one or more percutaneous leads, each having multiple electrodes, implanted within the patient's epidural space parallel to the axis of the spinal cord. The leads are connected to either a totally implanted system or a radio frequency system. The system is able to treat pain over different regions of a patient's body by “simultaneously” stimulating the patient with at least three different stimulation settings. “Simultaneous” stimulation involves sequentially stimulating the patient with the multiple stimulation settings such that the patient receives the cumulative effect of each stimulation setting, while not perceiving the transition from one stimulation setting to another.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: August 19, 2003
    Assignee: Advanced Neuromodulation Systems, Inc.
    Inventors: Jay Law, William Borkan, Lance Ehren, George Van Campen, John Erickson
  • Publication number: 20030126473
    Abstract: A system for providing basic system control functions upon failure of all management processors in a computer system. During normal system operation, a plurality of management processors monitor system sensors that detect system power, temperature, and cooling fan status, and make necessary adjustments. Each management processor normally provides an output signal indicating that it is operating property. A high-availability controller monitors each of these signals to verify that there is at least one operating management processor. When none of the processors indicate that they are operating properly, the high-availability controller monitors the system sensors and updates system indicators. If a problem develops, such as failure of a power supply or a potentially dangerous increase in temperature, the high-availability controller sequentially powers down the appropriate equipment to protect the system from damage.
    Type: Application
    Filed: July 30, 2001
    Publication date: July 3, 2003
    Inventors: David R. Maciorowski, Michael John Erickson, Paul J. Mantey
  • Publication number: 20030065916
    Abstract: The invention provides methods and logic for determining the source of a processor reset in a system having a processor and a plurality of processor reset sources. The plurality of processor reset sources couple to a corresponding plurality of RS latches. One of the RS latches sets in response to a processor reset generated by one of the processor resets. That one RS latch writes logic high to a dedicated register of a read register. After rebooting, the processor reads the read register to determine which register is logic high, corresponding to the source that generated the reset. The read register is reset by writing logic high into a write register, thereby resetting the set RS latch and clearing the logic high register of the read register. The processor writes logic low to all write register bits to clear enable the RS latches so that subsequent processor resets are identified.
    Type: Application
    Filed: July 30, 2001
    Publication date: April 3, 2003
    Inventors: Michael John Erickson, David R. Maciorowski
  • Publication number: 20030053570
    Abstract: Logic apparatus filters noise signals on a signal line to a digital circuit. An edge detector determines one or more edges of the noise signals relative to a fast clock. Signals indicative of the edges asynchronously reset a timer; the timer clocks the latch of the signal line when the signal line is stable, and without noise signals detected by the edge detector, for a period defined by a slow clock. The slow clock is slower than the fast clock by several orders of magnitude. The edge detector may be constructed by one flip-flop and an XOR gate. A second flip flop couples to the signal line and the output of the timer to pass through the latched value of the signal line to the digital circuit when clocked by the timer.
    Type: Application
    Filed: July 24, 2001
    Publication date: March 20, 2003
    Inventors: Michael John Erickson, Bradley D. Winick, David R. Maciorowski
  • Publication number: 20030023887
    Abstract: A system for providing basic system control functions upon failure of a management processor in a computer system. During normal system operation, a management processor monitors system sensors that detect system power, temperature, and cooling fan status, and make necessary adjustments. The management processor normally provides an output signal indicating that it is operating properly. A high-availability controller monitors each of these signals to verify that there is at least one operating management processor. When none of the processors indicate that they are operating properly, the high-availability controller monitors the system sensors and updates system indicators. If a problem develops, such as failure of a power supply or a potentially dangerous increase in temperature, the high-availability controller sequentially powers down the appropriate equipment to protect the system from damage.
    Type: Application
    Filed: July 30, 2001
    Publication date: January 30, 2003
    Inventors: David R. Maciorowski, Michael John Erickson, Paul J. Mantey