Patents by Inventor John F. Palmer

John F. Palmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7222116
    Abstract: A method and system for forming and procuring an integrated solution to meet a set of requirements. The invention includes an electronic exchange for providing an information technology (IT) solution, comprising: a matching system for matching IT requirements with a set of candidate IT components that provide the IT solution; a supplier exchange system for interfacing with suppliers of the set of candidate IT components; and an exchange catalog for storing information relating to available IT components, including supplier information.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: May 22, 2007
    Assignee: International Business Machines Corporation
    Inventors: Stephen E. Bello, Tze-Rong Fu, Kevin P. McAuliffe, John F. Palmer, Emily C. Plachy, Kathryn Priest Reece, David U. Shorter
  • Publication number: 20030145016
    Abstract: A method and system for forming and procuring an integrated solution to meet a set of requirements. The invention includes an electronic exchange for providing an information technology (IT) solution, comprising: a matching system for matching IT requirements with a set of candidate IT components that provide the IT solution; a supplier exchange system for interfacing with suppliers of the set of candidate IT components; and an exchange catalog for storing information relating to available IT components, including supplier information.
    Type: Application
    Filed: January 29, 2002
    Publication date: July 31, 2003
    Applicant: International Business Machines Corporation
    Inventors: Stephen E. Bello, Tze-Rong Fu, Kevin P. McAuliffe, John F. Palmer, Emily C. Plachy, Kathryn Priest Reece, David U. Shorter
  • Publication number: 20020091582
    Abstract: The present invention features a system that allows a merchant to create a web site from the embodiments of the present invention using a structure-template based software tool. The merchant then inputs information into the present invention and thereby automatically creates an index, with contact information, email capabilities, product listing and other information. At the same time, the merchant can generate product listings pages with photos, order forms with capabilities of linking related products and that can calculate totals, prices, shipping. The merchant can also generate a Web site search engine so customers can quickly find the products on the site they are looking for. The system has a fully customizable, easy-to use menu system, with everything password protected for security. The merchant may further create a Web site that automatically generates product listings with photos, along with detailed descriptions of the price, characteristics and attributes of each of the products.
    Type: Application
    Filed: May 11, 2001
    Publication date: July 11, 2002
    Inventors: John F. Palmer, Rick Davenport, William Meyers
  • Patent number: 5113523
    Abstract: A parallel processor comprised of a plurality of processing nodes (10), each node including a processor (100-114) and a memory (116). Each processor includes means (100, 102) for executing instructions, logic means (114) connected to the memory for interfacing the processor with the memory and means (112) for internode communication. The internode communication means (112) connect the nodes to form a first array (8) of order n having a hypercube topology. A second array (21) of order n having nodes (22) connected together in a hypercube topology is interconnected with the first array to form an order n+l array. The order n+l array is made up of the first and second arrays of order n, such that a parallel processor system may be structured with any number of processors that is a power of two. A set of I/O processors (24) are connected to the nodes of the arrays (8, 21) by means of I/O channels (106).
    Type: Grant
    Filed: May 6, 1985
    Date of Patent: May 12, 1992
    Assignee: NCUBE Corporation
    Inventors: Stephen R. Colley, David W. Jurasek, John F. Palmer, William S. Richardson, Doran K. Wilde
  • Patent number: 4338675
    Abstract: A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words or BCD data upon which it must operate. As a result the circuit has a greater reliability, range and precision than ever previously achieved without entailing additional circuit complexity. Reliability is further enhanced by a systematic three bit rounding field, and by including means for detecting every error or exception condition with an optional expected response provided thereto by hardware. As a result of such organization, an unexpected increase of capacity is achieved wherein transcendental functions can be computed totally in hardware, and whereby mixed mode arithmetic can be implemented without difficulty.
    Type: Grant
    Filed: February 13, 1980
    Date of Patent: July 6, 1982
    Assignee: Intel Corporation
    Inventors: John F. Palmer, Bruce W. Ravenel, Rafi Nave
  • Patent number: RE33629
    Abstract: A floating point, integrated, arithmetic circuit is organized around a file format having a floating point numeric domain exceeding that of any single or double precision floating point numbers, long or short integer words or BCD data upon which it must operate. As a result the circuit has a greater reliability, range and precision than ever previously achieved without entailing additional circuit complexity. Reliability is further enhanced by a systematic three bit rounding field, and by including means for detecting every error or exception condition with an optional expected response provided thereto by hardware. As a result of such organization, an unexpected increase of capacity is achieved wherein transcendental functions can be computed totally in hardware, and whereby mixed mode arithmetic can be implemented without difficulty.
    Type: Grant
    Filed: June 1, 1990
    Date of Patent: July 2, 1991
    Assignee: Intel Corporation
    Inventors: John F. Palmer, Bruce W. Ravenel, Rafi Nave