Abstract: In the digital computer system of the present invention, data items called immediate names represent other data items. The immediate name specifies either the address of the represented data item or the address of a pointer to the represented data item. Each immediate name contains a base address specifier specifying one of a set of architectural base addresses, an indirection specifier specifying whether the immediate name specifies the address of the represented item or the address of a pointer to the item, and a displacement from the specified architectural base address. The architectural base addresses are contained in registers accessible to a processor in the digital data processing system. The registers are loaded only when the processor preforms a call operation or a return operation.

Abstract: Improved apparatus for specifying and computing the current length of varying-length data items, together with methods for computing the current length. The apparatus and methods are used in a digital computer system wherein data items are represented by names associated with name table entry items in memory. The name table entry associated with the name represented by the varying-length data item includes a current number of elements item specifier specifying the address of a current number of elements item which specifies the number of elements currently in the represented varying-length data item. The name table entry further includes an element size specifier specifying the size of the elements. A name processor in the processor uses the current number of elements item specifier to obtain the the address of the current number of elements item and and fetches the current number of elements item from memory.

Abstract: An improved system for saving state during a call operation and restoring state during a return operation in a computer system in which different call and return operations require the saving and restoring of different amounts of state. The components of the system are call instructions whose operation codes specify the amount of state to be saved, frames which contain either basic state saved on every call operation and restored on every return operation or basic state and extended state saved only on certain calls and returns, a frame type item in each frame which specifies whether it contains only basic state or both basic and extended state, a single return instruction, state-saving apparatus which is responsive to the different call instructions, and state-restoring apparatus which is resposive to the single return instruction and to the frame type item.

Abstract: A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique indentification of information as objects and an extremely large address space accessible and common to all such systems.