Abstract: A data processing system can comprise a first module having a workspace and configured to execute a task that can request access to a frame in a system memory, a queue manager configured to store a frame descriptor which identifies the frame in the system memory, and a memory access engine coupled to the first module and the queue manager. The memory access engine copies requested segments of the frame to the workspace and has a working frame unit to store a segment handle identifying a location and size of each requested segment copied to the workspace of the first module. The memory access engine tracks history of a requested segment by updating the working frame unit when the requested segment in the workspace is modified by the executing task.

Abstract: Methods and systems are disclosed to access memory locations using auxiliary keys in addition to primary keys. Commands are received by a memory management unit to insert or access records in an exact match keyed lookup table where records include keys (i.e., primary keys), auxiliary keys, and data. When a command to insert a new record is received along with key and data, the memory management unit generates a new unique auxiliary key. The auxiliary key includes a table index generated from the key and a collision index that is unique for any records having the same table index. The key, the auxiliary key, and the data for the new record are then stored within the lookup table along with a collision pointer that links records having the same table index. Subsequently, commands to access the new record can selectively use either the original key or the auxiliary key.

Abstract: Configurable per-task state counters for processing cores in multi-tasking processing systems are disclosed along with related methods. In part, the disclosed embodiments include a work scheduler and a plurality of processing cores. The work scheduler assigns tasks to the processing cores, and the processing cores concurrently process multiple assigned tasks using a plurality of processing states. Further, task state counters are provided for each assigned task, and these task state counters are incremented for each cycle that the task stays within selected processing states to generate per-task state count values for the assigned tasks. These per-task state count values are reported back to the work scheduler when processing for the task ends. The work scheduler can then use one or more of the per-task state count values to adjust how new tasks are assigned to the processing cores.

Abstract: A data processing system includes a processor core and a hardware module. The processor core performs tasks on data packets. The ordering scope manager stores a first value in a first storage location. The first value indicates that exclusive execution of a first task in a first ordering scope is enabled. In response to a relinquish indicator being received, the ordering scope manager stores a second value in the first storage location. The second value indicates that the exclusively execution of the first task in the first ordering scope is disabled.

Abstract: A method and apparatus are provided for computing a CRC value for a data stream packet with a modified portion and an unmodified portion extending a distance to the end of the data stream packet by computing a first CRC value from the unmodified portion, computing a second CRC value from the modified portion, adjusting the second CRC value based on a shift length equal to the distance of the unmodified portion to compute a perspective shifted second CRC value by using a fixed number of distance lookup table operations, and generating an updated CRC value from the first CRC value and perspective shifted second CRC value, thereby avoiding recalculating a complete CRC value based on an entirety of the data stream packet.

Abstract: A data processing system can comprise a first module having a workspace and configured to execute a task that can request access to a frame in a system memory, a queue manager configured to store a frame descriptor which identifies the frame in the system memory, and a memory access engine coupled to the first module and the queue manager. The memory access engine copies requested segments of the frame to the workspace and has a working frame unit to store a segment handle identifying a location and size of each requested segment copied to the workspace of the first module. The memory access engine tracks history of a requested segment by updating the working frame unit when the requested segment in the workspace is modified by the executing task.

Abstract: Methods and systems are disclosed to access memory locations using auxiliary keys in addition to primary keys. Commands are received by a memory management unit to insert or access records in an exact match keyed lookup table where records include keys (i.e., primary keys), auxiliary keys, and data. When a command to insert a new record is received along with key and data, the memory management unit generates a new unique auxiliary key. The auxiliary key includes a table index generated from the key and a collision index that is unique for any records having the same table index. The key, the auxiliary key, and the data for the new record are then stored within the lookup table along with a collision pointer that links records having the same table index. Subsequently, commands to access the new record can selectively use either the original key or the auxiliary key.

Abstract: A method and apparatus are provided for computing a CRC value for a packet containing a data stream with a modified data unit data and one or more additional data units extending to the end of the data stream by computing a first CRC value from the one or more additional data units, computing a second CRC value from the modified data unit, adjusting the second CRC value based on a shift length equal to a distance of the one or more additional data units to compute a perspective shifted second CRC value by using fixed number of distance lookup table operations, and generating an updated CRC value from the first CRC value and perspective shifted second CRC value, thereby avoiding recalculating a complete CRC value based on an entirety of the modified data stream.

Abstract: A data processing system includes a content addressable memory (CAM). Each entry of the CAM corresponds to a task and is configured to store a current scope of each task. A random access memory (RAM) is configured to shadow information of the CAM. Transition position storage circuitry is configured to store transition age positions for tasks. Control circuitry is configured to, in response to a command to transition a selected task to a destination scope, access the RAM to determine the current scope for the selected task, use the current scope to perform a match determination with the CAM to determine if any entries corresponding to tasks other than the selected task match the current scope; and for any matching entries, updating a transition age position in the transition position storage circuitry for the corresponding task within the current scope.

Abstract: Configurable per-task state counters for processing cores in multi-tasking processing systems are disclosed along with related methods. In part, the disclosed embodiments include a work scheduler and a plurality of processing cores. The work scheduler assigns tasks to the processing cores, and the processing cores concurrently process multiple assigned tasks using a plurality of processing states. Further, task state counters are provided for each assigned task, and these task state counters are incremented for each cycle that the task stays within selected processing states to generate per-task state count values for the assigned tasks. These per-task state count values are reported back to the work scheduler when processing for the task ends. The work scheduler can then use one or more of the per-task state count values to adjust how new tasks are assigned to the processing cores.

Abstract: A data processing system includes a processor core and a hardware module. The processor core performs tasks on data packets. The ordering scope manager stores a first value in a first storage location. The first value indicates that exclusive execution of a first task in a first ordering scope is enabled. In response to a relinquish indicator being received, the ordering scope manager stores a second value in the first storage location. The second value indicates that the exclusively execution of the first task in the first ordering scope is disabled.

Abstract: A data processing system includes a content addressable memory (CAM). Each entry of the CAM corresponds to a task and is configured to store a current scope of each task. A random access memory (RAM) is configured to shadow information of the CAM. Transition position storage circuitry is configured to store transition age positions for tasks. Control circuitry is configured to, in response to a command to transition a selected task to a destination scope, access the RAM to determine the current scope for the selected task, use the current scope to perform a match determination with the CAM to determine if any entries corresponding to tasks other than the selected task match the current scope; and for any matching entries, updating a transition age position in the transition position storage circuitry for the corresponding task within the current scope.

Abstract: A data processor includes a single-token-record memory, a sequence circuit, and a memory controller. The single-token-record memory has a plurality of first storage locations. The sequencer circuit is coupled to the single-token-record memory. The sequencer circuit, responsive to a request to place a token in a tail-end of a queue, either stores said token into one of the plurality of first storage locations if the single-token-record memory stores no greater than a predetermined number of tokens associated with the tail-end of the queue, or stores the token with at least one additional token and a pointer to a next storage location into one of a plurality of second storage locations otherwise. The memory controller is coupled to the sequencer circuit to store the token with the at least one additional token and the pointer in a location of a multi-token-record memory having the plurality of second storage locations.

Abstract: In a stream processing node, a producer of properly ordered portions of a data stream, hereinafter referred to as substreams, is coupled to a stream fabric that is further coupled to a series of potential consumers for the data stream, one of the potential consumers being a content processing element. The producer outputs the substreams to a stream queue that is associated with the data stream within the stream fabric. Subsequently, a portion of the data within the stream queue is copied and analyzed by the content processing element which determines what further actions are to be taken with respect to the data within the particular stream queue.

Abstract: A data processor includes a single-token-record memory, a sequence circuit, and a memory controller. The single-token-record memory has a plurality of first storage locations. The sequencer circuit is coupled to the single-token-record memory. The sequencer circuit, responsive to a request to place a token in a tail-end of a queue, either stores said token into one of the plurality of first storage locations if the single-token-record memory stores no greater than a predetermined number of tokens associated with the tail-end of the queue, or stores the token with at least one additional token and a pointer to a next storage location into one of a plurality of second storage locations otherwise. The memory controller is coupled to the sequencer circuit to store the token with the at least one additional token and the pointer in a location of a multi-token-record memory having the plurality of second storage locations.

Abstract: The invention provides a method and apparatus for policing a traffic flow in which a first stage of policing is performed on the traffic flow to produce a first stage conforming flow and a first stage violating flow. These two flows are then policed again in a second stage of policing, such that the first stage conforming flow can take advantage of a capacity allowed for the first stage violating flow which is unused by the first stage violating flow. In some embodiments, performing a first stage of policing involves associating each packet of the traffic flow with one of a plurality of sub-flows, policing at least one of the plurality of sub-flows individually to produce for each sub-flow a respective conforming sub-flow and a respective violating sub-flow. The conforming sub-flow(s) collectively are the first stage conforming flow. The violating sub-flows collectively are the first stage violating flow.

Abstract: A method and apparatus for searching for a character pattern within a data stream. A checksum is computed for one or more patterns for which the data stream will be searched. The patterns may be of the same length or they may be of different lengths. A shift register is used to sequentially parse through the data stream and compute the checksum of a series of bytes in the data stream. If the checksum of the bytes in the data stream that have been shifted into the register matches the checksum from one of the character patterns, then the character pattern corresponding to the checksum has been found. The system may search multiple character patterns simultaneously by using multiple checksum generators in parallel.

Abstract: A method and apparatus for searching for a character pattern within a data stream. A checksum is computed for one or more patterns for which the data stream will be searched. The patterns may be of the same length or they may be of different lengths. A shift register is used to sequentially parse through the data stream and compute the checksum of a series of bytes in the data stream. If the checksum of the bytes in the data stream that have been shifted into the register matches the checksum from one of the character patterns, then the character pattern corresponding to the checksum has been found. The system may search multiple character patterns simultaneously by using multiple checksum generators in parallel.

Abstract: In a stream processing node, a producer of properly ordered portions of a data stream, hereinafter referred to as substreams, is coupled to a stream fabric that is further coupled to a series of potential consumers for the data stream, one of the potential consumers being a content processing element. The producer outputs the substreams to a stream queue that is associated with the data stream within the stream fabric. Subsequently, a portion of the data within the stream queue is copied and analysed by the content processing element which determines what further actions are to be taken with respect to the data within the particular stream queue.

Abstract: A stream switch fabric includes a series of stream queues coupled to a stream queue controller. A producer operates to output properly ordered portions of a data stream, hereinafter referred to as substreams, to one of the stream queues while the stream queue controller operates to control the outputting of a portion of the data within the stream queue to a consumer of the stream queue. The stream queue controller can initiate further actions within the stream queue such as copying a portion of the data within the stream queue to a content processing element for analysis; redirecting the data within the stream queue to another consumer of the data stream, such as another processing element or an interface with a packet switched network; modifying a portion of the data within the stream queue; and/or transferring a portion of the data within the stream queue to another stream queue within the stream switch fabric.