Patents by Inventor John F. Steiner

John F. Steiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Global synchronous clock circuit and method for blade processors
    Patent number: 9104343
    Abstract: Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: August 11, 2015
    Assignee: Silicon Graphics International Corp.
    Inventors: Rodney A. Ruesch, Eric C. Fromm, Robert W. Cutler, Richard G. Finstad, Dale R. Purdy, Brian J. Johnson, John F. Steiner
  • Global Synchronous Clock
    Publication number: 20140281656
    Abstract: Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: Silicon Graphics International Corp.
    Inventors: Rodney A. Ruesch, Eric C. Fromm, Robert W. Cutler, Richard G. Finstad, Dale R. Purdy, Brian J. Johnson, John F. Steiner