Patents by Inventor John Fingerhut
John Fingerhut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8032529Abstract: An interface is operable to receive an element for deletion from a bloom filter. The bloom filter includes multiple hash functions and an array. A processor is operable to generate hash function output values for the element using the hash functions. The hash function output values correspond to indices identifying bits in the array. A memory is operable to maintain supplemental data structure entries. The supplemental data structure has entries associated with the indices. The processor is operable to modify the supplemental data structure entries to delete the element from the bloom filter.Type: GrantFiled: April 12, 2007Date of Patent: October 4, 2011Assignee: Cisco Technology, Inc.Inventors: Shashank Gupta, Murali Basavaiah, John Fingerhut
-
Patent number: 7739426Abstract: A processing engine includes descriptor transfer logic that receives descriptors generated by a software controlled general purpose processing element. The descriptor transfer logic manages transactions that send the descriptors to resources for execution and receive responses back from the resources in response to the sent descriptors. The descriptor transfer logic can manage the allocation and operation of buffers and registers that initiate the transaction, track the status of the transaction, and receive the responses back from the resources all on behalf of the general purpose processing element.Type: GrantFiled: October 31, 2006Date of Patent: June 15, 2010Assignee: Cisco Technology, Inc.Inventors: Donald E. Steiss, Christopher E. White, Jonathan Rosen, John A. Fingerhut, Barry S. Burns
-
Patent number: 7721151Abstract: An apparatus has at least one processing unit to generate a request having a request privilege level. At least one resource exists in the apparatus to receive the request and determine if the request is allowable. The apparatus includes an error handler that determines the nature of an error and performs a reset based upon the privilege level of the request that cause the error.Type: GrantFiled: August 30, 2005Date of Patent: May 18, 2010Assignee: Cisco Technology, Inc.Inventors: James A. Markevitch, Earl T. Cohen, John A. Fingerhut, Johannes M. Hoerler
-
Patent number: 7664897Abstract: A resource interconnect architecture and associated descriptor protocol provides more efficient communication between different resources in a data processing system. One embodiment uses a backdoor interconnect that allows some resources to communicate without using a central resource interconnect. Another embodiment uses nested descriptors that allow operations by different resources to be chained together without having to communicate back to an originating descriptor resource. In another embodiment, the descriptors are generated in hardware or in software. Other embodiments assign priority or privilege values to the descriptors that optimize processing and error handling performance.Type: GrantFiled: December 1, 2005Date of Patent: February 16, 2010Assignee: Cisco Technology Inc.Inventors: Earl T. Cohen, Donald Steiss, William Eatherton, John Williams, Jr., John A. Fingerhut
-
Publication number: 20080256094Abstract: An interface is operable to receive an element for deletion from a bloom filter. The bloom filter includes multiple hash functions and an array. A processor is operable to generate hash function output values for the element using the hash functions. The hash function output values correspond to indices identifying bits in the array. A memory is operable to maintain supplemental data structure entries. The supplemental data structure has entries associated with the indices. The processor is operable to modify the supplemental data structure entries to delete the element from the bloom filter.Type: ApplicationFiled: April 12, 2007Publication date: October 16, 2008Applicant: Cisco Technology, Inc.Inventors: Shashank Gupta, Murali Basavaiah, John Fingerhut
-
Publication number: 20070050671Abstract: An apparatus has at least one processing unit to generate a request having a request privilege level. At least one resource exists in the apparatus to receive the request and determine if the request is allowable. The apparatus includes an error handler that determines the nature of an error and performs a reset based upon the privilege level of the request that cause the error.Type: ApplicationFiled: August 30, 2005Publication date: March 1, 2007Inventors: James Markevitch, Earl Cohen, John Fingerhut, Johannes Hoerler
-
Publication number: 20060179204Abstract: A resource interconnect architecture and associated descriptor protocol provides more efficient communication between different resources in a data processing system. One embodiment uses a backdoor interconnect that allows some resources to communicate without using a central resource interconnect. Another embodiment uses nested descriptors that allow operations by different resources to be chained together without having to communicate back to an originating descriptor resource. In another embodiment, the descriptors are generated in hardware or in software. Other embodiments assign priority or privilege values to the descriptors that optimize processing and error handling performance.Type: ApplicationFiled: December 1, 2005Publication date: August 10, 2006Inventors: Earl Cohen, Donald Steiss, William Eatherton, John Williams, John Fingerhut
-
Publication number: 20060179156Abstract: A network processor has numerous novel features including a multi-threaded processor array, a multi-pass processing model, and Global Packet Memory (GPM) with hardware managed packet storage. These unique features allow the network processor to perform high-touch packet processing at high data rates. The packet processor can also be coded using a stack-based high-level programming language, such as C or C++. This allows quicker and higher quality porting of software features into the network processor. Processor performance also does not severely drop off when additional processing features are added. For example, packets can be more intelligently processed by assigning processing elements to different bounded duration arrival processing tasks and variable duration main processing tasks. A recirculation path moves packets between the different arrival and main processing tasks.Type: ApplicationFiled: February 8, 2005Publication date: August 10, 2006Applicant: Cisco Technology, Inc.Inventors: Will Eatherton, Earl Cohen, John Fingerhut, Donald Steiss, John Williams
-
Publication number: 20050220112Abstract: Sequences of items may be maintained using ordered locks. These items may correspond to anything, but using ordered locks to maintain sequences of packets, especially for maintaining requisite packet orderings when distributing packets to be processed to different packet processing engines, may be particularly useful. For example, in response to a particular packet processing engine completing processing of a particular packet, a gather instruction is attached to the particular identifier of a particular ordered lock associated with the particular packet. If no longer needed for further processing, the packet processing engine is immediately released to be able to process another packet or perform another function. The gather instruction is performed in response to the particular ordered lock being acquired by the particular identifier, with the gather instruction causing the processed particular packet to be sent.Type: ApplicationFiled: July 16, 2004Publication date: October 6, 2005Applicant: CISCO TECHNOLOGY, INC.Inventors: John Williams, John Fingerhut, Doron Shoham, Shimon Listman
-
Publication number: 20050216461Abstract: Data is protected using locks, with the protected data sometimes being included in the locking messages, which may reduce overall processing latency, and/or reduce a bandwidth requirement for and/or number of storage operations accessing the native storage of the protected data. For example, the lock manager receives lock requests from each of the requesters, and selectively grants the lock requests. The protected data is typically communicated in the locking messages when the lock is highly contested, or at least two request for access to the data are pending. The lock manager initiates the sequence by indicating in a grant message to a requester to include the protected data in its release message. The lock manager then copies this data received in the release message to its grant message to the next requestor.Type: ApplicationFiled: March 27, 2004Publication date: September 29, 2005Applicant: CISCO TECHNOLOGY, INC., A CALIFORNIA CORPORATIONInventors: John Williams, John Fingerhut, Jonathan Rosen
-
Publication number: 20050100017Abstract: Sequences of items may be maintained using ordered locks. These items may correspond to anything, but using ordered locks to maintain sequences of packets may be particularly useful. One implementation uses a locking request, acceptance, and release protocol. One implementation associates instructions with locking requests such that when a lock is acquired, the locking mechanism executes or causes to be executed the associated instructions as an acceptance request of the lock is implied by the association of instructions (or may be explicitly requested). In some applications, the ordering of the entire sequence of packets is not required to be preserved, but rather only among certain sub-sequences of the entire sequence of items, which can be accomplished by converting an initial root ordered lock (maintaining the sequence of the entire stream of items) to various other locks (each maintaining a sequence of different sub-streams of items).Type: ApplicationFiled: November 12, 2003Publication date: May 12, 2005Applicant: CISCO TECHNOLOGY, INC., A CALIFORNIA CORPORATIONInventors: John Williams, John Fingerhut, Kenneth Potter