Abstract: A process is disclosed to form through silicon vias in a silicon wafer. The method comprises, forming a dielectric layer on a silicon wafer, forming a masking layer using photolithography, etching the dielectric layer, and electrochemically etching a through silicon via in the silicon wafer.

Abstract: A method for processing semiconductor wafers is disclosed. A solution is applied to a semiconductor wafer to prevent dendrites and electrolytic reactions at the surface of metal interconnects. The solution can be applied during a CMP process or during a post CMP cleaning process. The solution may include a surfactant and a corrosion inhibitor. In one embodiment, the concentration of the surfactant in the solution is less than approximately one percent by weight and the concentration of the corrosion inhibitor in the solution is less than approximately one percent by weight. The solution may also include a solvent and a cosolvent. In an alternate embodiment, the solution includes a solvent and a cosolvent without the surfactant and corrosion inhibitor. In one embodiment, the CMP process and post CMP cleaning process can be performed in the presence of light having a wavelength of less than approximately one micron.

Abstract: The present invention provides a composition and a method of polishing a surface that minimizes abrasive removal of material from the surface. To that end, the composition is formulated to maximize dissolution of the material from the surface.