Patents by Inventor John G. Atwood, Jr.

John G. Atwood, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamic random access memory system
    Patent number: 5511024
    Abstract: As interfaces to DRAMs become more advanced and higher performance, the interfaces and signal lines required to support the interface become more expensive to implement. Therefore, it is desirable to minimize the number of signal lines and maximize the bandwidth of the signal lines interfacing to the DRAM in order to take advantage of the high performance of the signal lines in the interface. In the DRAM memory system of the present invention, the address and control lines and are combined and the information multiplexed such that the DRAM pins have roughly equal information rate at all times.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: April 23, 1996
    Assignee: Rambus, Inc.
    Inventors: Frederick A. Ware, John B. Dillon, Richard M. Barth, Billy W. Garrett, Jr., John G. Atwood, Jr., Michael P. Farmwald
  • Dynamic random access memory system
    Patent number: 5434817
    Abstract: As interfaces to DRAMs become more advanced and higher performance, the interfaces and signal lines required to support the interface become more expensive to implement. Therefore, it is desirable to minimize the number of signal lines and maximize the bandwidth of the signal lines interfacing to the DRAM in order to take advantage of the high performance of the signal lines in the interface. In the DRAM memory system of the present invention, the address and control lines and are combined and the information multiplexed such that the DRAM pins have roughly equal information rate at all times.
    Type: Grant
    Filed: November 3, 1994
    Date of Patent: July 18, 1995
    Assignee: Rambus, Incorporated
    Inventors: Frederick A. Ware, John B. Dillon, Richard M. Barth, Billy W. Garrett, Jr., John G. Atwood, Jr., Michael P. Farmwald
  • Dynamic random access memory system
    Patent number: 5430676
    Abstract: As interfaces to DRAMs become more advanced and higher performance, the interfaces and signal lines required to support the interface become more expensive to implement. Therefore, it is desirable to minimize the number of signal lines and maximize the bandwidth of the signal lines interfacing to the DRAM in order to take advantage of the high performance of the signal lines in the interface. In the DRAM memory system of the present invention, the address and control lines and are combined and the information multiplexed such that the DRAM pins have roughly equal information rate at all times.
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: July 4, 1995
    Assignee: Rambus, Inc.
    Inventors: Frederick A. Ware, John B. Dillon, Richard M. Barth, Billy W. Garrett, Jr., John G. Atwood, Jr., Michael P. Farmwald