Abstract: A multiphase current-sharing configuration may include at least two power supplies providing respective output-currents in the current-sharing configuration. One or more of the power supplies may itself be a multiphase power supply. A first power supply of the current-sharing configuration may detect a phase difference between an external control signal provided to the first power supply to control the output voltage of the first power supply, and an internal control signal provided by a VCO of the first power supply. The phase difference may be provided to an integrator to cause the internal control signal to track the external control signal when the external control signal is available, and maintain a present operating frequency of the internal control signal in case the external control signal is lost, in which case the internal control signal may be used to uninterruptedly control the output voltage of the first power supply.

Abstract: A multiphase current-sharing configuration may include at least two power supplies providing respective output-currents in the current-sharing configuration. One or more of the power supplies may itself be a multiphase power supply. A first power supply of the current-sharing configuration may detect a phase difference between an external control signal provided to the first power supply to control the output voltage of the first power supply, and an internal control signal provided by a VCO of the first power supply. The phase difference may be provided to an integrator to cause the internal control signal to track the external control signal when the external control signal is available, and maintain a present operating frequency of the internal control signal in case the external control signal is lost, in which case the internal control signal may be used to uninterruptedly control the output voltage of the first power supply.

Abstract: A multiphase current-sharing configuration may include at least two power supplies providing respective output-currents in the current-sharing configuration. One or more of the power supplies may itself be a multiphase power supply. A first power supply of the current-sharing configuration may detect a phase difference between an external control signal provided to the first power supply to control the output voltage of the first power supply, and an internal control signal provided by a VCO of the first power supply. The phase difference may be provided to an integrator to cause the internal control signal to track the external control signal when the external control signal is available, and maintain a present operating frequency of the internal control signal in case the external control signal is lost, in which case the internal control signal may be used to uninterruptedly control the output voltage of the first power supply.

Abstract: A multiphase power converter may include a number of LLC converter stages coupled in a parallel interleaved current sharing configuration. The total current provided by the multiphase power converter may be balanced between the different LLC converter stages by sensing a respective output current in each LLC converter stage, with the sensed output current of one of the LLC converter stages used as a reference current, and performing one or more adjustments for each LLC converter stage (other than the reference LLC converter stage), based on the sensed output currents. The adjustments may include adjusting the input voltage provided to the LLC converter stage, the resonant frequency of the LLC converter stage, and/or the effective resonance impedance of the LLC converter stage. The ability to sense the phase current or power makes it possible to achieve balance between different LLC converter stages in a multiphase LLC-stage current sharing configuration.

Abstract: System and methods for use and fabrication of a printed circuit board (PCB). The PCB may include a node and a plurality of rows of vias that may be configured to establish a plurality of current pathways away from the node. The node may be a sensitive node and the plurality of current pathways may reduce leakage current at the node responsive to a signal applied to the node. Each row of the plurality of rows of vias may be offset with respect to adjacent rows of vias in a horizontal plane of the PCB. The PCB may have multiple layers and the node may be on an exterior surface layer or an interior layer. The vias may be mirco-vias, buried-vias, or through-vias.

Abstract: System and methods for use and fabrication of a printed circuit board (PCB). The PCB may include a node and a plurality of rows of vias that may be configured to establish a plurality of current pathways away from the node. The node may be a sensitive node and the plurality of current pathways may reduce leakage current at the node responsive to a signal applied to the node. Each row of the plurality of rows of vias may be offset with respect to adjacent rows of vias in a horizontal plane of the PCB. The PCB may have multiple layers and the node may be on an exterior surface layer or an interior layer. The vias may be mirco-vias, buried-vias, or through-vias.

Abstract: A method for compensating for a dielectric absorption effect in a measurement configuration during measurements by an instrument having measurement terminals includes providing a feedback loop in the instrument, the loop having a gain adjustment and a simulation impedance and being adapted to provide a signal counter to the dielectric absorption at the measurement terminals; applying a transient calibration signal to the test terminals for at least two values of the gain adjustment; measuring a response to the calibration signal for each of the at least two values; and determining an operating value of the gain adjustment based on the measured responses. The operating value is used for subsequent measurements by the instrument, the simulation impedance modeling the dielectric absorption characteristics of the measurement configuration.

Abstract: An electronic instrument having in its circuitry a specific solid state switch that exhibits detrimental current leakage at elevated temperatures, a variable voltage device in the instrument connected to the specific switch, the variable voltage device being capable, at an experimentally determined voltage setting, of zeroing out the leakage current in the specific switch, the variable voltage device being set at a voltage setting determined experimentally using said specific switch at an elevated temperature thereby temperature compensating said specific switch.

Abstract: A circuit for controlling a voltage across a device and permitting measurement of a current through the device includes a sense impedance in series combination with, the device, a sensed voltage measured across the sense impedance being representative of the current through the device; a capacitive stability element in parallel combination with the sense resistance, the capacitive stability element being virtually absent by connection to a virtual version of the sensed voltage when the device has a first capacitance and being present when the device has a second capacitance, the second capacitance being larger than the first capacitance.

Abstract: A range-changing circuit includes an array of graduated impedances in serial relationship, and a voltage sensing and limiting switch across one of said impedances. The switch limits the voltage across said one of the impedances in response to a voltage sensed by the switch.

Abstract: A circuit for alternatively controlling a current through a device and permitting measurement of a voltage across the device or controlling a voltage across the device and permitting measurement of a current through the device includes a sense impedance in series combination with the device, an error amplifier selectable to control the controlled current or voltage, the error amplifier providing an error signal for the control, and a floating buffer driving the series combination in response to the error signal.

Abstract: A low leakage solid state switch for range-changing uses a pair of low leakage diodes switched to a reference voltage to block leakage through the switch when it is in the "off" state.

Abstract: A current in a circuit is measured without breaking the circuit. A relatively low resistance element in the circuit such as a component lead is chosen. A current is forced through the element and the voltage drop measured. Another current is forced through the element and the voltage drop measured. The values of these currents and voltages are used to determine the original current in the circuit.

Abstract: Two enhancement mode MOSFETs in series are used to provide a solid-state switch. The MOSFETs are turned on by a photovoltaic array. Resistors in series with the MOSFETs serve to provide a control voltage to current-limit the circuit. An additional photovoltaic array is used to supply drain to gate bias when the switch is off to minimize device capacitance. The circuits can be cascaded to raise the voltage-handling limits.

Abstract: A range selecting impedance is switched into or out of a parallel range-selecting network by connecting the impedance across the network through an n-channel and a p-channel FET connected in parallel output configuration. The n-channel FET does the switching if the drains are negative with respect to the sources. The p-channel FET does the switching if the drains are positive with respect to the sources. Each FET is controlled by a gate drive whose output waveform is varied to select the rate at which the FETs switch. In cases of several different switched range impedances, the FETs are used to switch the smallest impedance into the network, another range impedance is selected, and then the FETs used to switch the smallest impedance out of the network. In this way, fast glitch-free range switching is achieved.

Abstract: An apparatus capable of acting as a current-limited voltage source or a voltage-limited current source is disclosed. The output of the apparatus is provided by a differential amplifier. The current and voltage outputs are compared to positive and negative current and voltage limits. Depending on whether the apparatus is in the voltage mode or the current mode, the inverting input of the differential amplifier is clamped to the appropriate voltage or current comparison signal, respectively, to provide an error signal to the differential amplifier. This clamping is current limited so that if the output current limits are exceeded while in the voltage source mode, a clamp to one of the current comparison signals occurs and dominates the voltage clamp. Similarly, if the output voltage limits are exceeded while in the current source mode, a clamp to one of the voltage comparison signals occurs and dominates the current clamp.