Abstract: Various embodiments of the present technology generally relate to semiconductor device architectures and manufacturing techniques. More specifically, some embodiments of the present technology relate to large area metrology and process control for anisotropic chemical etching. Catalyst influenced chemical etching (CICE) can be used to create high aspect ratio semiconductor structures with dimensions in the nanometer to millimeter scale with anisotropic and smooth sidewalls. However, all aspects of the CICE process must be compatible with the equipment used in semiconductor fabrication facilities today, and they must be scalable to enable wafer scale processing with high yield and reliability. This invention relates to metrology and control of etch and CMOS compatible methods of patterning the catalyst and removing it without damaging the etched structures.

Abstract: In some aspects, the present disclosure provides methods of depositing a metal onto a nanomaterial which has been passivized with a self-assembled monolayer at a weakened point in the topography of the nanomaterial. In some embodiments, the weakened point is caused by the curvature of the topography. This method may be used to prepare electronic devices such as memory modules.

Abstract: In some aspects, the present disclosure provides methods of depositing a metal onto a nanomaterial which has been passivized with a self-assembled monolayer at a weakened point in the topography of the nanomaterial. In some embodiments, the weakened point is caused by the curvature of the topography. This method may be used to prepare electronic devices such as memory modules.

Abstract: A sensor for detecting one or more materials includes a substrate, a passivation layer formed on the substrate, a self-resonant structure and a high surface area material disposed on the passivation layer. The self-resonant structure includes a planar spiral inductor and a plurality of planar interdigitated capacitor electrodes disposed within the passivation layer. The planar spiral inductor includes an electrically conductive trace formed on the substrate in a planar spiral pattern having at least two turns and an inter-winding space between parallel segments of the electrically conductive trace. The plurality of planar interdigitated capacitor electrodes are electrically connected to the electrically conductive trace of the planar spiral inductor and formed on the substrate within the inter-winding space of at least one outermost turn of the planar spiral inductor. The high surface area material includes a conformal polymer coating to increase a sensitivity to the one or more materials.

Abstract: Disclosed herein is an automatic fluid dispensing method and system for dispensing fluid on the surface of a plate-like material, or substrate, including a semiconductor wafer for imprint lithography processes. The dispensing method uses fluid dispenser and a substrate stage that may generate relative lateral motions between a fluid dispenser tip a substrate. Also described herein are methods and devices for creating a planar surface on a substrate using a substantially unpatterned planar template.

Abstract: A sensor for detecting one or more materials includes a substrate, a passivation layer formed on the substrate, a self-resonant structure and a high surface area material disposed on the passivation layer. The self-resonant structure includes a planar spiral inductor and a plurality of planar interdigitated capacitor electrodes disposed within the passivation layer. The planar spiral inductor includes an electrically conductive trace formed on the substrate in a planar spiral pattern having at least two turns and an inter-winding space between parallel segments of the electrically conductive trace. The plurality of planar interdigitated capacitor electrodes are electrically connected to the electrically conductive trace of the planar spiral inductor and formed on the substrate within the inter-winding space of at least one outermost turn of the planar spiral inductor. The high surface area material includes a conformal polymer coating to increase a sensitivity to the one or more materials.

Abstract: An imprint lithography template may be used to form an imprinted layer in a light curable liquid disposed on a substrate. During use, the template may be disposed within a template holder. The template holder may include a body with an opening configured to receive the template, a support plate, and an actuator system coupled to the body. The actuator system may be configured to alter a physical dimension of the template during use.

Abstract: Described are imprint lithography templates, methods of forming and using the templates, and a template holder device. An imprint lithography template may include a body with a plurality of recesses on a surface of the body. The body may be of a material that is substantially transparent to activating light. At least a portion of the plurality of recesses may define features having a feature size less than about 250 nm. A template may be formed by obtaining a material that is substantially transparent to activating light and forming a plurality or recesses on a surface of the template. In some embodiments, a template may further include at least one alignment mark. In some embodiments, a template may further include a gap sensing area. An imprint lithography template may be used to form an imprinted layer in a light curable liquid disposed on a substrate. During use, the template may be disposed within a template holder.

Abstract: One embodiment of the present invention is an imprint template for imprint lithography that comprises alignment marks embedded in bulk material of the imprint template.

Abstract: The present invention includes a template comprising a plurality of protrusions and a plurality of recessions with a distance between a zenith of any of the plurality of protrusions and a nadir of any one of the plurality of recessions being less than 250 nm.

Abstract: The present invention includes methods for forming a boron carbo-nitride layer. Additional embodiments include thermal chemical vapor deposition methods for forming a boron carbo-nitride layer. Also integrated circuit devices with a boron carbo-nitride layer are disclosed.

Abstract: The present invention includes methods for forming a boron carbo-nitride layer. Additional embodiments include thermal chemical vapor deposition methods for forming a boron carbo-nitride layer. Also integrated circuit devices with a boron carbo-nitride layer are disclosed.

Abstract: The present invention involves chemical compounds particularly useful for the preparation of thin films or layers of group 3/group 5 materials by MOCVD and other techniques. Such compounds may be represented as having the formulas [M(ER'R").sub.3 ].sub.n or [RM(ER'R").sub.2 ].sub.n or [R.sub.2 M(ER'R")].sub.n wherein M is aluminum, gallium or indium; E is phosphorus, arsenic or antimony; R, R', and R" are one or more of hydrogen, alkyl, aryl, alkyl-substituted aryl, cyclic alkyl, halide or other anionic group; and n is between about 1 and about 6.