Patents by Inventor John G. Faase

John G. Faase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System bus for multiprocessor computer system
    Patent number: 5113514
    Abstract: The invention comprises a system bus apparatus and method for a multi-arm, multiprocessor computer system having a main memory and localized buffer cache memories at each processor. Each block of data in a cache includes tag bits which identifies the condition of the data block in relation to the corresponding data in main memory and other caches. The system bus (SYSBUS) comprises three subparts; 1) a MESSAGE/DATA bus, 2) a REQUEST/GRANT bus and 3) a BCU bus. The MESSAGE/DATA bus is coupled to every device on the system and is used for transferring messages, data and addresses. The REQUEST/GRANT bus couples between every device on an arm of the system and that arm's bus control unit (BCU). The BCU bus couples between the various BCUs.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: May 12, 1992
    Assignee: Prime Computer, Inc.
    Inventors: David H. Albonesi, Brian K. Langendorf, John Chang, John G. Faase, Michael J. Homberg