Patents by Inventor John G. Gore

John G. Gore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6105226
    Abstract: A leadless ceramic chip carrier useful in surface mounting of SAW devices includes electrically conductive vias and metalization between input and output bond pads for improved crosstalk suppression between input and output device connections. A protrusion extending from a top layer of a multilayer ceramic carrier provides additional electrical contact to a package seal brazed thereto. The vias are positioned between input and output bond pads and connect the metalized protrusion to package ground pads through contact with multiple metalized layers of the package for enhancing the electrical connection between the package Kovar seal ring and customer accessed ground pads. For further suppression of crosstalk, bond pads within the package for connection to the SAW device are spaced at a greater distance from each other than their corresponding pads on the package bottom surface thus maintaining an optimum spacing for package connection to printed circuit board pads for minimizing thermal mismatch effects.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: August 22, 2000
    Assignee: Sawtek Inc.
    Inventors: John G. Gore, Neal J. Tolar, Roy B. Brown, Sunder Gopani
  • Patent number: 6011693
    Abstract: A surface mounting stress relief system for mounting a surface mount package such as a leadless ceramic chip carrier on a printed circuit board includes a printed circuit board having a top layer attached to a bottom layer. The top layer includes cavities for exposing top surface portion of the bottom layer which carry a plurality of solder pads. The surface mount package is positioned on the printed circuit board for placing the package bottom surface on a top surface of the printed circuit board between the cavities while positioning package contact pads in spaced relation above corresponding preselected solder pads. A solder column extends between each of the plurality of corresponding solder pads and the selected contact pads for providing an electrical connection.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: January 4, 2000
    Assignee: Sawtek Inc.
    Inventor: John G. Gore
  • Patent number: 5866867
    Abstract: A seam welder for sealing a cover of a surface mount package to its carrier includes a table for receiving a fixture which itself carried surface mount packages to be welded for sealing an electronic component therein. Electrical current to welding electrodes is controlled for resistance welding the cover to the carrier. Electrode temperature and table temperature and monitored. Heat exchangers including a reservoir and heat transfer fluid interface with the electrodes and the table for controlling their respective temperatures and thus the temperature of the fixture and package during the welding of the cover to the carrier.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: February 2, 1999
    Assignee: Sawtek Inc.
    Inventor: John G. Gore
  • Patent number: 5864092
    Abstract: A leadless ceramic chip carrier useful in surface mounting of SAW devices includes electrically conductive vias and metalization between input and output bond pads for improved crosstalk suppression between input and output device connections. A protrusion extending from a top layer of a multilayer ceramic carrier provides additional electrical contact to a package seal brazed thereto. The vias are positioned between input and output bond pads and connect the metalized protrusion to package ground pads through contact with multiple metalized layers of the package for enhancing the electrical connection between the package Kovar seal ring and customer accessed ground pads. For further suppression of crosstalk, bond pads within the package for connection to the SAW device are spaced at a greater distance from each other than their corresponding pads on the package bottom surface thus maintaining an optimum spacing for package connection to printed circuit board pads for minimizing thermal mismatch effects.
    Type: Grant
    Filed: May 16, 1996
    Date of Patent: January 26, 1999
    Assignee: Sawtek Inc.
    Inventors: John G. Gore, Neal J. Tolar, Roy B. Brown, Sunder Gopani
  • Patent number: 5690270
    Abstract: A device and method for mounting a surface mount package onto a printed circuit board includes inserting a pin through a printed circuit board feedthrough for providing movement of the pin within the feedthrough. One end of the pin is soldered to conductive surfaces on the bottom side of the printed circuit board while the other end of the pin id soldered to a surface mount package pad. The package is mounted in a spaced relation with a printed circuit board top surface. The pin is soldered to the board conductive surface using a high temperature solder for forming a solder joint which remains solid during subsequent soldering using a low temperature solder such as a lead tin solder type. The pin is then soldered to the pad of the surface mount package using the low temperature lead tin solder for forming a solder joint between the pad and pin.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: November 25, 1997
    Assignee: Sawtek Inc.
    Inventor: John G. Gore
  • Patent number: 5573172
    Abstract: A hidden lead package device is configured to be placed between a leadless component such as a surface mount package (SMP) used to house a SAW device and a standard printed circuit board configured for solder joints in a leadless contact with the printed circuit board. The hidden lead device is made using materials having similar characteristic thermal expansion properties as that of the SMP and printed circuit board pads to which the hidden lead is affixed. The hidden lead extends across the underside of the SMP along the PCB surface. One end of the lead is brazed to an SMP pad and the opposite end is soldered to a communicating PCB pad. The brazing temperature is higher than the reflow temperature for the solder. The hidden lead device causes the relative movement between the leadless carrier and the printed circuit board to occur along a length of the hidden lead and thus minimizes tensional or compressive forces to the solder joints.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: November 12, 1996
    Assignee: Sawtek, Inc.
    Inventor: John G. Gore
  • Patent number: 5369551
    Abstract: An interface printed circuit board is configured to be placed between a leadless component such as a surface mount package used to house a SAW device and a standard printed circuit board configured for solder joints in a leadless contact with the printed circuit board. The interface device is made using materials having similar characteristic thermal expansion properties as that of the printed circuit to with it is affixed. Solder pads are placed in offset pairs and interface board material is removed such that the combination causes the interface board to flex from the forces caused by the differing expansion coefficients of the solder, the package and the printed circuit boards. The configuration causes the relative movement between the leadless carrier and the printed circuit board to occur along a length of epoxy and glass board material by bending the epoxy and glass as opposed to applying tensional or compressive forces to the solder joints.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: November 29, 1994
    Assignee: Sawtek, Inc.
    Inventors: John G. Gore, Neal J. Tolar
  • Patent number: 4684783
    Abstract: An environmental control apparatus for electronic circuit elements includes an enclosure for the element and standoff brackets supporting the enclosure, the enclosure and support brackets together defining an area of both high heat resistivity and high heat conductivity, with a heating mechanism with the area of high heat conductivity in order to reduce the flow of heat and to maintain a balanced temperature profile along the enclosure.
    Type: Grant
    Filed: November 6, 1985
    Date of Patent: August 4, 1987
    Assignee: Sawtek, Inc.
    Inventor: John G. Gore