Abstract: An improved low inductance termination scheme is disclosed for grid array capacitors. The enhanced termination scheme provides for shorter termination length and leaves the sides of a capacitive element free from any structure. The area typically taken up by solder lands is reduced, facilitating much closer chip spacing on a circuit board. The arrangement generally includes interleaved dielectric and electrode layers in an interdigitated configuration. Vias are drilled through tabs extending from selected of the electrode layers, and then filled with suitable conductive material. Solder balls may be applied directly to this conductive material, providing a ball grid array (BGA) packaged chip ready to mount on an IC and reflow. Composition of such solder balls is easily varied to comply with specific firing conditions. Such capacitor chips are also compatible with land grid array (LGA) packaging techniques.

Abstract: A capacitor structure is described as having a plurality of dielectric materials located so that each dielectric material is in parallel between capacitor plates. The capacitor value of this structure is preset, therefore, for operation electrically at different specific temperatures. The description gives a specific stacked arrangement for the various dielectric materials in which this capacitor can be formed, as one example of that to which it is adaptable.

Abstract: A method of manufacturing a terminated ceramic capacitor comprises forming the capacitor in the configuration of a parallelepiped having end surfaces joining the major base portions which define an acute angle with one base and an obtuse angle with the other. Electrodes of opposite polarities are exposed at the opposite end surfaces. A conductive coating, generally of metal or metal frit is applied to the entire end and base surfaces, the side surfaces being maintained clear of termination material. By removing termination materials from the acute angle junctions of end and base surfaces there is provided a capacitor which may be inserted into a circuit by contact with the opposite bases or the opposite ends. the invention relates also to the unique resultant capacitor.

Abstract: A miniaturized surface mountable tombstoning resistant electronic component is disclosed. The terminals of the component are respectively L and J shaped conductive metal portions. The portions of the terminations covering the ends of the components are formed of a non-solder, wettable conductive metal, whereas the portions of the terminations underlying the bottom surface of the component are comprised of solder wettable metal. The disclosure further relates to a method of manufacturing the described termination structures.

Abstract: A capacitor structure is described as having a plurality of dielectric materials located so that each dielectric material is in parallel between capacitor plates. The capacitor value of this structure is preset, therefore, for operation electrically at different specific temperatures. The description gives a specific stacked arrangement for the various dielectric materials in which this capacitor can be formed, as one example of that to which it is adaptable.

Abstract: A method of manufacturing solid state capacitors involves providing an elongate band of solid state forming metal, folding the band into a trough-like U-shaped configuration, introducing a layer of solid state metal powder into the trough, sintering the powdered metal to thereby bond the metal to the foil, partially severing the foil and sintered powder to define a multiplicity of individual units which are thereafter processed to convert the units into capacitors by sequential dielectric forming and counterelectrode depositing steps. The individual capacitors are terminated and preferably also may be tested while still interconnected by portions of the foil, following which individual capacitors are separated by cuts which register with the initial cuts which defined the individual units. The disclosure further teaches a novel solid state capacitor fabricated in accordance with the method, the capacitor exhibiting high volumetric efficiency and being particularly adapted for surface mounting.

Abstract: A ceramic capacitor and method of making same is disclosed. The capacitor is trapezoidal in longitudinal section with the electrodes exposed at the angled ends of the trapezoid. The ends face generally in the same direction such that both ends may be simultaneously exposed to a sputtering or vapor deposition procedure and thus sputtered in a single operation without requiring re-masking. The sputtering step, in addition to providing terminations, functions to mechanically couple a multiplicity of capacitors into a compact grouping from which one or more capacitors may be readily extracted.

Abstract: An improved surface mountable tantalum capacitor and method of making same are disclosed. In accordance with the method of tubular tantalum container is fully or partially filled with tantalum powder, sintered to bond the powder to itself and to the container and thereafter conventionally processed to form dielectric and counter-electrode coatings. An anode termination is secured to an exterior surface of the container and a cathode termination is secured to a portion of the counter-electrode exposed through an opening in the container. The resultant capacitor is characterized by high capacitance per volume, a small footprint, shock resistance and low ESR.

Abstract: A multilayer ceramic capacitive device resistant to delamination and method of making the same are disclosed. Intervening layers are interposed between the metallic electrode layers and the dielectric layers, the intervening layers being comprised of ceramic compatible with the ceramic of the dielectric and increments of metal compatible with the electrode layers. In the sintering process augmented bonds are formed between the electrode metal and components of metal in the intervening layers and similarly such bonds are formed between the ceramic components of the intervening layers and the dielectric components. In addition to delamination resistance the resultant capacitors provides augmented mechanical adhesion of the terminations to the end faces of the capacitor and improved heat dissipation.

Abstract: An improved method of forming electrostrictive actuators or capacitors is disclosed. A stack of green ceramic sheets is formed, a surface of the sheets including areas of electrode forming material and other areas of heat dispersible material. The electrodes of opposite polarity are exposed at opposite surfaces of the stack and areas of dispersible material intervene between the exposed edges of the electrode ink margins. An actuator fabricated in accordance with the method may be terminated without fear of shorting between adjacent layers and the resultant actuator will be essentially free of dielectric bonding whereby, when used as an actuator, a high degree of expansion will be achieved. The invention is further directed to a preform fabricated in accordance with the method of the invention.

Abstract: An improved method for forming shorting bars on ceramic capacitors of the tab type includes the step of effecting a final polishing of the tab exposed surface utilizing grit or abrasives of a critical size, namely of average particle size in the range of about 2 to about 10 microns. The method further employs thin film metallurgy namely the vacuum deposition or sputtering of one or more layers within specified thickness ranges. There is further disclosed an improved capacitor fabricated in accordance with the method described.

Abstract: A method of forming successive metal layers of varying widths on a substrate is disclosed. A mask having a through going aperture is provided, the mask including a constricted neck portion between its upper and lower surfaces. Successive metal layers are applied over the substrate through the aperture in the mask sequentially by sputtering methods which form a metallic layer wider than the constricted neck portion of the mask and by vapor deposition method which forms a narrower metal layer corresponding to the transverse dimension of the constricted portion of the mask.

Abstract: A method and apparatus for testing and/or burning-in electronic devices such as capacitors is disclosed. The devices are loaded in a matrix having a multiplicity of apertures. A second matrix having complemental apertures is provided, the apertures of the second matrix being filled with fuses. The matrices are pressed together by yieldable electrodes which are connected with a source of current.