Abstract: Implementations of a resistive random access memory may include a bottom electrode; a helical layer of hafnium oxide coupled to the bottom electrode; an isolation layer coupled to the helical layer; and a top electrode coupled to the isolation layer.

Abstract: Implementations of light filters for use in cryptographic operations may include: a substrate having at least a first side and a second side, the first side opposing the second side, the substrate including one of a translucent, a transparent, and a semi-transparent material, and any combination thereof; and one or more layers of microscopic structures coupled to one of the first side, the second side, and both the first side and the second side of the substrate, the microscopic structures each containing one or more structural elements configured to interact with light. The microscopic structures may be configured to collectively form a unique light pattern on a detector optically coupled with the light filter. The unique pattern may be configured to be used to form a challenge-response pair (CRP) and the CRP is configured to be used in cryptographic operations to authenticate an electronic device associated with the light filter.

Abstract: Implementations of light filters for use in cryptographic operations may include: a substrate having at least a first side and a second side, the first side opposing the second side, the substrate including one of a translucent, a transparent, and a semi-transparent material, and any combination thereof; and one or more layers of microscopic structures coupled to one of the first side, the second side, and both the first side and the second side of the substrate, the microscopic structures each containing one or more structural elements configured to interact with light. The microscopic structures may be configured to collectively form a unique light pattern on a detector optically coupled with the light filter. The unique pattern may be configured to be used to form a challenge-response pair (CRP) and the CRP is configured to be used in cryptographic operations to authenticate an electronic device associated with the light filter.

Abstract: A system comprising a read out device for reading a radiation image stored in a photostimulable phosphor screen and for generating a digital signal representation of a read out image wherein the read out device supports a single format and is coupled to a processing unit which is programmed for cropping a region of interest (ROI) in the read out image.

Abstract: The present invention is a Christmas tree ornament that includes a base ornament that is generally star-shaped, a plurality of metal rods that are disposed along a perimeter of the base ornament and an attachment string that is disposed on top of the base ornament that is tied to a stationary object or an area. The Christmas tree ornament also includes a plurality of mini lights that are disposed throughout the outer surface of the base ornament that serve as a decorative feature and a plurality of tinsel that is disposed throughout the outer surface of the base ornament that serves as an additional decorative feature.

Abstract: A method for processing a medical image represented by a digital image signal and accompanying image identification data wherein upon processing of one of the image and the image identifying data, a corresponding change of the other is effectuated.

Abstract: Frequency synthesizer utilizing fractional-N synthesis includes a phase detector having an input receivable of a reference frequency, a loop filter arranged to receive the signal from the phase detector, a tunable oscillator arranged to receive a tuning signal generated by the loop filter and provide an output frequency and an integer divider arranged to receive the output frequency of the oscillator, divide it by a division control number (N+F) and provide the divided output frequency to the phase detector. The division control number is made up of an integer (N) and a fraction portion (F) separated into at least two different fractions. The fraction portion is generated by at least two sigma-delta converters, each processing a respective fraction with the sigma-delta converter processing a smaller fraction being driven at a lower clock rate than a sigma-delta converter processing the largest fraction.