Abstract: A system and an accelerator circuit includes an internal memory to store data received a memory associated with a processor and a filter circuit block comprising a plurality of circuit stripes, each circuit stripe including a filter processor, a plurality of filter circuits, and a slice of the internal memory assigned to the plurality of filter circuits, where the filter processor is to execute a filter instruction to read data values from the internal memory based on a first memory address, for each of the plurality of circuit stripes: load the data values in weight registers and input registers associated with the plurality of filter circuits of the circuit stripe to generate a plurality of filter results, and write a result generated using the plurality of filter circuits in the internal memory at a second memory address.

Abstract: A system includes a processor and an accelerator circuit including an input circuit block comprising an input processor to perform first tasks of a neural network application, a filter circuit block comprising a filter processor to perform second tasks of the neural network application, and a plurality of general-purpose filters communicatively coupled to the input circuit block and the filter circuit block, where the input circuit block and the filter circuit block form stages of an execution pipeline, a producer stage is to supply data values to a consumer stage, and operation of the consumer stage is on hold until a start flag stored in a first general-purpose register of the plurality of general-purpose registers is set by the producer stage.

Abstract: A system and method include an accelerator circuit comprising an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block and a processor to initialize the accelerator circuit, determining tasks of a neural network application to be performed by at least one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, assign each of the tasks to a corresponding one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, instruct the accelerator circuit to perform the tasks, and execute the neural network application based on results received from the accelerator circuit completing performance of the tasks.

Abstract: A light-emitting diode (LED) lighting device includes a white light source characterized by a general color rendering index (CRI) value and a first color-specific CRI value, and one or more LED elements of a color light within a wavelength band, wherein a combined light source comprising the white light source and the one or more LED elements is characterized by the general CRI value and a second color-specific CRI value, and the second color-specific CRI value is greater than the first color-specific CRI value.

Abstract: A processor includes a vector register file including vector registers, at least one buffer register, and a vector processing core to receive a vector instruction comprising a first identifier representing a first vector register of the vector registers, and a second identifier representing a second vector register of the vector registers, wherein the first vector register is a source register and the second vector register is a destination register, execute the vector instruction based on data values stored in the first vector register to generate a result and store the result in the at least one buffer register, and copy the result from the at least one buffer register to the second vector register.

Abstract: A system and method relating to constructing an encoder and decoder neural network for providing semantic image segmentation includes generating an encoder comprising encoding convolution layers, each of the encoding convolution layers specifying an encoding filter operation using a respective first filter kernel, generating a decoder corresponding to the encoder, the decoder comprising decoding convolution layers, each of the decoding convolution layers being associated with a corresponding encoding convolution layer, and each of the decoding convolution layers specifying a decoding filter operation using a respective second filter kernel derived from the first filter kernel of the corresponding encoder convolution layer, and providing an input image to the encoder and the decoder for semantic image segmentation.

Abstract: A system and method relating to object detection may include receiving an image frame comprising an array of pixels captured by an image sensor associated with the processing device, identifying a near-field image segment and a far-field image segment in the image frame, applying a first neural network trained for near-field image segments to the near-field image segment for detecting the objects presented in the near-field image segment, and applying a second neural network trained for far-field image segments to the far-field image segment for detecting the objects presented in the near-field image segment.

Abstract: A system and an accelerator circuit includes an internal memory to store data received a memory associated with a processor and a filter circuit block comprising a plurality of circuit stripes, each circuit stripe including a filter processor, a plurality of filter circuits, and a slice of the internal memory assigned to the plurality of filter circuits, where the filter processor is to execute a filter instruction to read data values from the internal memory based on a first memory address, for each of the plurality of circuit stripes: load the data values in weight registers and input registers associated with the plurality of filter circuits of the circuit stripe to generate a plurality of filter results, and write a result generated using the plurality of filter circuits in the internal memory at a second memory address.

Abstract: An intelligent light system installed on a motor vehicle includes a light source to provide illumination for the motor vehicle, wherein a wavelength of a light beam generated by the light source is adjustable, a plurality of sensors for capturing sensor data of an environment surrounding the motor vehicle, and a processing device to receive the sensor data captured by the plurality of sensors, provide the sensor data to a neural network to determine a first state of the environment, and issue a control signal to adjust the wavelength of the light beam based on the determined first state of the environment.

Abstract: An anti-collision system and method of a vehicle including a first sensor device to capture first sensor data associated with a first vehicle in front of the vehicle, a second sensor device to capture second sensor data associated with a second vehicle behind the vehicle, and a processing device to calculate, based on the first sensor data, a plurality of first parameters characterizing the first vehicle, calculate, based on the second sensor data, a plurality of second parameters characterizing the second vehicle, responsive to detecting a braking event by the first vehicle, determine, based on a rule taking into consideration at least one of the plurality of first parameters and at least one of the plurality of second parameters, a braking force for the vehicle, and generate a braking control signal that applies the braking force to brakes of the vehicle.

Abstract: A system and method include an accelerator circuit comprising an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block and a processor to initialize the accelerator circuit, determining tasks of a neural network application to be performed by at least one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, assign each of the tasks to a corresponding one of the input circuit block, the filter circuit block, the post-processing circuit block, or the output circuit block, instruct the accelerator circuit to perform the tasks, and execute the neural network application based on results received from the accelerator circuit completing performance of the tasks.

Abstract: A system includes a processor and an accelerator circuit including an input circuit block comprising an input processor to perform first tasks of the neural network application, a filter circuit block comprising a filter processor to perform second tasks of the neural network application, and a plurality of general-purpose filters communicatively coupled to the input circuit block, the filter circuit block, where the input circuit block and the filter circuit block form stages of an execution pipeline, a producer stage is to supply data values to a consumer stage, and operation of the consumer stage is on hold until a start flag stored in a first general-purpose register of the plurality of general-purpose registers to be set by the producer stage.

Abstract: A system includes a memory, a processor, and an accelerator circuit. The accelerator circuit includes an internal memory, an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block to concurrently perform tasks of a neural network application assigned to the accelerator circuit by the processor.

Abstract: A processor including a vector register file comprising a plurality of vector registers, at least one buffer register, and a vector processing core, communicatively connected to the vector register file and the at least one buffer register, to receive a vector instruction comprising a first identifier representing a first vector register of the plurality of vector registers, and a second identifier representing a second vector register of the plurality of vector registers, wherein the first vector register is a source register and the second vector register is a destination register, execute the vector instruction based on data values stored in the first vector register to generate a result and store the result in the at least one buffer register, and responsive to determining that the second vector register is safe to write, copy the result from the at least one buffer register to the second vector register.

Abstract: A system and method to operate an autonomous vehicle on the road. The system and method may include determining a lane area on a road, calculating a first position within the lane area, determining a tolerance region within the lane area, calculating a deviation offset based on the tolerance region, calculating a second position based on the first position and the deviation offset, and causing to operate the autonomous vehicle to travel to the second position.

Abstract: A system and method relating to object detection using multiple sensor devices include receiving a range data comprising a plurality of points, each of plurality of points being associated with an intensity value and a depth value, determining, based on the intensity values and depth values of the plurality of points, abounding box surrounding a cluster of points among the plurality of points, receiving a video image comprising an array of pixels, determining a region in the video image corresponding to the bounding box, and applying a first neural network to the region to determine an object captured by the range data and the video image.

Abstract: A washing machine including a rotatable cylinder comprising a washing chamber to hold washables, one or more sensors, and a processing device, communicatively connected to the one or more sensors to control an operation of the washing machine, to receive sensor data captured by the one or more sensors, determine, using a machine learning model based on the sensor data, a plurality of properties associated with the washables, determine a setting for the washing machine based on the plurality of properties, and cause the washing machine to operate according to the setting.

Abstract: A system includes a memory, a processor, and an accelerator circuit. The accelerator circuit includes an internal memory, an input circuit block, a filter circuit block, a post-processing circuit block, and an output circuit block to concurrently perform tasks of a neural network application assigned to the accelerator circuit by the processor.

Abstract: The multi-band antenna structure includes a first antenna having a band width about a middle frequency and a second antenna spaced and electrically isolated from the antenna. Ends of the second antenna are shorted to each other and the antenna floats electrically. The first and second antennas are planar and superimposed in parallel planes. At least two layers of dielectric material of a thickness is between the two antennas. A third layer of dielectric material of a third thickness is between the two antennas.

Abstract: A scalar Kalman filter is applied for a Least-Square estimated value Hs at s. The filter has an input for receiving Hs, a filter equation and an out for the corrected estimated value Hsk for the kth variable. The filter equation is Hsk=KgainSn[k] wherein: correction Sn[k]=S+Kn(Hs?S); prediction of the correction S=KaSn[k]; Kalman filter gain Kn=P/(1+P); minimum predication MSE P=Ka2Pn[k]+Kb; minimum MSE Pn[k]=P (1?Kn); and Ka, Kgain and Kb are constants.