Abstract: A humidity control system for an enclosure includes a housing having a process air duct and a regeneration air duct, with return air from the enclosure and/or atmospheric air being supplied to the process air duct and atmospheric air being supplied to the regeneration duct. A desiccant wheel is rotatably mounted in the housing for rotation through the ducts for absorbing moisture in the process air duct and releasing moisture in the regeneration duct. A refrigeration system including a condenser coil in the regeneration duct upstream of the desiccant wheel is connected to a heat pump which includes a heat exchanger and a recirculating fluid loop connected between the condenser coil and the heat exchanger for transferring heat from the recirculating fluid loop to said reactivation airstream.

Abstract: The invention relates to materials and methods for diagnosis and treatment of chronic fatigue syndrome/myalgic encephalitis. A number of genes are identified which are expressed at abnormal levels in patients affected by CFS/ME as compared to normal healthy individuals. These genes include those encoding defensin ?1, haemoglobin ?, CXCR4, tubulin beta 1, serine/threonine kinase 17B, HLA DRss4 and prostaglandin D2 synthase. The genes identified provide objective disease markers that may be used in diagnostic tests to support the diagnosis of CFS/ME or for monitoring the effectiveness of therapy. They also provide a rational basis for classifying CFS/ME patients according to the biochemical lesion underlying their symptoms and enable provision of appropriate targeted therapies.

Abstract: Devices, systems and methods for operating a deep fat fryer are shown and described. In one particular embodiment, the fryer incorporates a cooking pan, a burner, and flue wrap; the pan has a substantially flat base; the burner is positioned under the pan, and the flue wrap is adapted to receive gaseous combustion products from the burner and direct it toward the pan.

Abstract: An improved package for semiconductor chips, and method of forming the package are provided. The package includes a lead frame having a central chip bonding portion and first and second sets of interdigitaled fingers. The inner ends of the first set of fingers terminate at a distance from the central chip bonding portion closer than the inner ends of the fingers of the second set at fingers. A semiconductor chip, having input/output pads is bonded to the central chip bonding portion. A first set of wires directly couples respective input/output pads on the chip to the first set of fingers. A second set of wires couples respective input/output pads on the chip with the second set of fingers. Each of the wires of the second set of wires has a first segment extending from its respective input/output pad to an intermediate bonding region, and a second segment extending from the intermediate bonding region to its respective finger of the second set of fingers.

Abstract: According to the present invention, an improved chip and leadframe package assembly and method of making the same is provided. The package assembly is comprised of a metal leadframe having a chip bond pedestal centrally located and a plurality of discrete leads surrounding the pedestal. An I/C (integrated circuit) semiconductor chip is mounted on the pedestal, the chip having a plurality of connection or bonding pads disposed around the periphery. An interposer having a layer of dielectric material and discrete metal lines formed thereon is mounted on an apron of the chip bonding pedestal between the location of the chip and the inner discrete leads of the leadframe. Connections are provided between the bonding pads on the chip and the respective lines on the interposer and connections are also provided between the fingers and the respective lines on the leadframe.

Abstract: Electronic device packaging structures useful for electrically interconnecting an electronic device to a substrate. The structure contains at least two metallization layers with dielectric layers between adjacent to metallization layers. The dielectric layers can have variable thickness. Beam leads can project inwardly in cantilevered fashion over a central aperture through the dielectric layers. The inner ends of the beam leads lie substantially in one plane and can be bonded to contact pads on integrated circuit electronic devices. Beam leads can project outwardly from the metallization layers over outer edges of the dielectric layers for bonding to contact pads on a substrate. Signal leads on metallization layers can be symmetrically arranged between ground and voltage leads to provide optimal impedance properties. These structures are useful for tape automated bonding applications.

Abstract: A method for laser trimming of resistors which includes sputter depositing or vaporizing resistor material in a limited area but the resistor geometry and trimming location is designed to achieve a maximum resistor trimming range with a minimum substrate area occupied by the resistor. A cermet resistor is fabricated on a metallized ceramic substrate with the resistor having a low length to width ratio. A laser cut is used to provide resistor values greater than 250 ohms and up to 16000 ohms.