Abstract: A level-shift buffer device includes an input buffer circuit, a configurable circuit and a level-shift circuit. The input buffer circuit receives input/output (I/O) supply voltage at a first voltage level among a plurality of voltage levels that are supported by the level-shift buffer device. The input buffer circuit generates a first input signal according to the first voltage level of the I/O supply voltage. The configuration circuit controls at least one transistor of the configurable circuit according to the configuration signal to generate a second input signal. The level-shift circuit generates an output signal at a second voltage level according to the second input signal and the configuration signal, wherein the level-shift circuit functions as an inverter or a level shifter in accordance with the configuration signal.

Abstract: A level-shift buffer device includes an input buffer circuit, a configurable circuit and a level-shift circuit. The input buffer circuit receives input/output (I/O) supply voltage at a first voltage level among a plurality of voltage levels that are supported by the level-shift buffer device. The input buffer circuit generates a first input signal according to the first voltage level of the I/O supply voltage. The configuration circuit controls at least one transistor of the configurable circuit according to the configuration signal to generate a second input signal. The level-shift circuit generates an output signal at a second voltage level according to the second input signal and the configuration signal, wherein the level-shift circuit functions as an inverter or a level shifter in accordance with the configuration signal.

Abstract: In an aspect, the disclosure is directed to an electrical circuit which includes not limited to: a first bonding pad having a bias voltage, a voltage pull-up circuit configured to set the bias voltage of the first bonding pad to a high voltage, a voltage pull-down circuit configured to switch bias voltage of the first bonding pad from the high voltage to a low voltage in response to the voltage pull-down circuit receiving a first control signal which activates the voltage-pull down circuit, a rise time delay control circuit configured to control a rise time of the bias voltage of the first bonding pad, wherein the bias voltage of the first bonding pad starts to rise in response to the first control signal deactivating the voltage pull-down circuit, and a driving circuit configured to drive a second control signal to activate the driving circuit.

Abstract: In an aspect, the disclosure is directed to an electrical circuit which includes not limited to: a first bonding pad having a bias voltage, a voltage pull-up circuit configured to set the bias voltage of the first bonding pad to a high voltage, a voltage pull-down circuit configured to switch bias voltage of the first bonding pad from the high voltage to a low voltage in response to the voltage pull-down circuit receiving a first control signal which activates the voltage-pull down circuit, a rise time delay control circuit configured to control a rise time of the bias voltage of the first bonding pad, wherein the bias voltage of the first bonding pad starts to rise in response to the first control signal deactivating the voltage pull-down circuit, and a driving circuit configured to drive a second control signal to activate the driving circuit.

Abstract: Programmable dynamic amplifiers with hysteresis are provided. The hysteretic amplifiers have a first input voltage threshold when the output voltage is at a high voltage and a second input voltage threshold when the output voltage is at a low voltage. A multiplexer controls the hysteretic threshold voltages in response to the output signal of the amplifier. The hysteretic amplifiers can be programmed to have positive or negative hysteresis. When the amplifier is programmed with positive hysteresis, the output voltage transitions after the input voltages have both reached a common voltage value. When the amplifier is programmed with negative hysteresis, the output voltage transitions before the input voltages have both reached a common voltage value.

Abstract: Programmable dynamic amplifiers with hysteresis are provided. The hysteretic amplifiers have a first input voltage threshold when the output voltage is at a high voltage and a second input voltage threshold when the output voltage is at a low voltage. A multiplexer controls the hysteretic threshold voltages in response to the output signal of the amplifier. The hysteretic amplifiers can be programmed to have positive or negative hysteresis. When the amplifier is programmed with positive hysteresis, the output voltage transitions after the input voltages have both reached a common voltage value. When the amplifier is programmed with negative hysteresis, the output voltage transitions before the input voltages have both reached a common voltage value.

Abstract: Programmable dynamic amplifiers with hysteresis are provided. The hysteretic amplifiers have a first input voltage threshold when the output voltage is at a high voltage and a second input voltage threshold when the output voltage is at a low voltage. A multiplexer controls the hysteretic threshold voltages in response to the output signal of the amplifier. The hysteretic amplifiers can be programmed to have positive or negative hysteresis. When the amplifier is programmed with positive hysteresis, the output voltage transitions after the input voltages have both reached a common voltage value. When the amplifier is programmed with negative hysteresis, the output voltage transitions before the input voltages have both reached a common voltage value.

Abstract: Output buffers are provided that are compatible with any differential output standard. The output buffers compensate for variations in process, the supply voltage, and temperature. The edge rate of an output buffer can be programmed to be compatible with different output standards. The edge rate of an output buffer can compensate for variations in process, voltage, and temperature. The output voltage of an output buffer can be adjusted to be compatible with different output standards.