Abstract: An Inverse Multiplexer is disclosed which first demultiplexes a first data rate input signal into a plurality of second lower data rate subsectional signals, where each subsectional signal is provided with a periodic synchronization marker and includes a data rate which is less than the channel data rate used to transmit that subsectional signal to a remote terminal. Programmable Multiplexers (PMUXs) then operate to each take one or more subsectional signals that are (1) clock synchronized to a PMUX clock, and (2) a rational fraction of the channel data rate, and map contiguously assigned time slots in a capacity domain frame for each subsectional signal to time slots of a time domain frame format using a 2-step or 3-step digit reverse technique. The resultant time domain format has the input subsectional capacity domain time slots substantially uniformly distributed over the time domain frame.