Abstract: An object lock management system for use in a parallel data processing system where objects are accessible by processing activities on computing nodes within the parallel system. The system includes local lock control elements, where each of the local lock control element coordinates the locking of a predetermined set of objects. In particular, each local lock control element grants locks or queues lock requests in response to lock requests. Lock information is selectively reported to a global deadlock detector which performs deadlock detection. The global deadlock detector instructs the local lock control elements to release selected locks and queued lock requests upon detecting a deadlock. Lock information is reported to the global deadlock detector periodically and only for queued lock requests that have timed-out, whereby message traffic and processing overhead is reduced in the parallel system.

Abstract: A pipelined microprogrammed data processing system is provided having a three-stage pipelined architecture implemented so as to in effect provide for the execution of a plurality of microinstructions using three separate processors operating 120 degrees out of phase with one another and sharing the same physical hardware. Synchronized microinstruction tasking and dynamic resource allocation are also provided in the system to provide both multiprogramming and multiprocessing on a microinstruction level.

Abstract: A microprogrammed data processing system is provided in which each high level instruction is performed by one or more tasks, each task being in turn performed by executing one or more task microinstructions in a microprogrammed manner. Dynamic resource allocation is provided by employing a plurality of dynamically allocatable registers whose free and use states are continuously monitored in an allocation register. The outputs of the allocation register are used as an address for a register allocation memory which is mapped so as to identify a particular group of free registers which are available for assignment for each new task in response to the allocation register address.

Abstract: A microprogrammed data processing system is provided in which each high level instruction is performed by one or more tasks, each task being in turn performed by executing one or more task microinstructions in a microprogrammed manner. Dynamic resource allocation and task synchronization are additionally provided along with a three-stage pipelined architecture so as to provide both multiprogramming and multiprocessing on a microinstruction level.