Patents by Inventor John Harper

John Harper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260140934
    Abstract: Systems and methods are disclosed which facilitate data record organization, searching, and retrieval in connection with large datasets. Data records in large datasets may be organized such that, when a system executes a search of the dataset, each block read responsive to the search contains as many relevant records as possible, minimizing or eliminating cycles spent reading blocks that contain no records that are relevant to the search.
    Type: Application
    Filed: December 31, 2025
    Publication date: May 21, 2026
    Applicant: Fermat International, Inc.
    Inventor: John Harper
  • Patent number: 12628645
    Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10?6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
    Type: Grant
    Filed: June 14, 2024
    Date of Patent: May 12, 2026
    Assignee: Intel Corporation
    Inventors: Susmriti Das Mahapatra, Malavarayan Sankarasubramanian, Shenavia Howell, John Harper, Mitul Modi
  • Patent number: 12494441
    Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, the electronic package further comprises a stiffener on the package substrate surrounding the die. In an embodiment, the stiffener is a ring with one or more corner regions and one or more beams. In an embodiment, each beam is between a pair of corner regions, and the one or more corner regions have a first thickness and the one or more beams have a second thickness that is greater than the first thickness.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: December 9, 2025
    Assignee: Intel Corporation
    Inventors: Phil Geng, Patrick Nardi, Ravindranath V. Mahajan, Dingying David Xu, Prasanna Raghavan, John Harper, Sanjoy Saha, Yang Jiao
  • Publication number: 20250321946
    Abstract: Systems and methods are disclosed which facilitate data record organization, searching, and retrieval in connection with large datasets. Data records in large datasets may be organized such that, when a system executes a search of the dataset, each block read responsive to the search contains as many relevant records as possible, minimizing or eliminating cycles spent reading blocks that contain no records that are relevant to the search.
    Type: Application
    Filed: April 16, 2024
    Publication date: October 16, 2025
    Inventor: John Harper
  • Publication number: 20250062168
    Abstract: The present disclosure is directed to a patterned stiffener that includes a metallic body, which is a component of and is attached to a semiconductor device platform for providing rigidity. In an aspect, there are patterned sections formed on the metallic body that act to modulate the metallic body to obtain a desired configuration for the semiconductor device platform. In another aspect, the present disclosure is also directed to a method that includes providing a platform for forming an electronic component, disposing a stiffener having a metallic body on the platform, disposing at least one semiconductor device onto the platform, performing one or more bonding process steps, and exposing the stiffener to localized heating to modulate changes in the stiffener to a pre-determined shape or desired configuration.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Inventors: Justin WHETTEN, Zhou YANG, Zheng KANG, Haowen LIU, Bassam ZIADEH, Vijay Krishnan SUBRAMANIAN, John HARPER, Pramod MALATKAR, Patrick NARDI, Anthony MONTERROSA, Michael TAN, Sean BUSHELL
  • Patent number: 12183688
    Abstract: A stiffener for an integrated circuit (IC) package assembly including an IC die electrically interconnected to a substrate. The stiffener is to be mechanically attached to the substrate adjacent to at least one edge of the IC die and have a coefficient of linear thermal expansion (CTE) exceeding that of the substrate. The stiffener may be an “anti-invar” metallic alloy. Anti-invar alloys display “anti-invar” behavior where thermal expansion of the material is significantly enhanced relative to other compositions of the particular alloy system. A package stiffener may be a high-Mn steel, for example, such as ASTM International A128. In other examples, a package stiffener is a MnCuNi, FeNiMn, or FeNiCr alloy having an average CTE over a range of 25-100° C. of at least 18 ppm, and a room temperature modulus of elasticity of at least 120 GPa.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: December 31, 2024
    Assignee: Intel Corporation
    Inventors: Valery Ouvarov-Bancalero, John Harper, Malavarayan Sankarasubramanian, Patrick Nardi, Bamidele Daniel Falola, Ravi Siddappa, James Mertens
  • Publication number: 20240332112
    Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10?6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
    Type: Application
    Filed: June 14, 2024
    Publication date: October 3, 2024
    Applicant: Intel Corporation
    Inventors: Susmriti Das Mahapatra, Malavarayan Sankarasubramanian, Shenavia Howell, John Harper, Mitul Modi
  • Patent number: 12040246
    Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10?6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 16, 2024
    Assignee: Intel Corporation
    Inventors: Susmriti Das Mahapatra, Malavarayan Sankarasubramanian, Shenavia Howell, John Harper, Mitul Modi
  • Publication number: 20240162134
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Inventors: Xiao LU, Jiongxin LU, Christopher COMBS, Alexander HUETTIS, John HARPER, Jieping ZHANG, Nachiket R. RARAVIKAR, Pramod MALATKAR, Steven A. KLEIN, Carl DEPPISCH, Mohit SOOD
  • Patent number: 11916003
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 27, 2024
    Assignee: Intel Corporation
    Inventors: Xiao Lu, Jiongxin Lu, Christopher Combs, Alexander Huettis, John Harper, Jieping Zhang, Nachiket R. Raravikar, Pramod Malatkar, Steven A. Klein, Carl Deppisch, Mohit Sood
  • Publication number: 20230307379
    Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, the electronic package further comprises a stiffener on the package substrate surrounding the die. In an embodiment, the stiffener is a ring with one or more corner regions and one or more beams. In an embodiment, each beam is between a pair of corner regions, and the one or more corner regions have a first thickness and the one or more beams have a second thickness that is greater than the first thickness.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Phil GENG, Patrick NARDI, Ravindranath V. MAHAJAN, Dingying David XU, Prasanna RAGHAVAN, John HARPER, Sanjoy SAHA, Yang JIAO
  • Publication number: 20230248079
    Abstract: Compression shorts are provided with a sleeve having an opening at a proximal end of the sleeve that communicates with an opening in the crotch area of the shorts. The sleeve is attached to the crotch area of compression shorts by an elastic engagement of the shorts with the sleeve at a proximal end of the sleeve. A flap is joined to the sleeve. The girth of the sleeve and is expanded or contracted by locating and attaching an end of the flap against the sleeve. A distal end of the sleeve comprises a closure flap to permit covering or uncovering a distal opening in the sleeve, and to adjust the useful length of the sleeve.
    Type: Application
    Filed: February 8, 2022
    Publication date: August 10, 2023
    Inventor: John Harper
  • Patent number: 11694210
    Abstract: A computerized system and method of managing events surrounding the lifecycle of used and new mobile devices. The system provides a “360 view” that integrates a mobile device's service options, such as financing and device protection, as well as at the device level regarding potential hardware/software errors. This provides an end-to-end view of consumers, such as claims on device protection plans, repayment issues, utilization of upgrades and/or other information in a user's profile across multiple underlying systems during the device's lifecycle.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: July 4, 2023
    Assignee: Likewize Corp.
    Inventors: Mariela Millington, Ranga Rajamanickam, John Harper, Clay Bodnarek
  • Patent number: 11532113
    Abstract: At least certain embodiments of the present disclosure include a method for animating a display region, windows, or views displayed on a display of a device. The method includes starting at least two animations. The method further includes determining the progress of each animation. The method further includes completing each animation based on a single timer.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: December 20, 2022
    Assignee: APPLE INC.
    Inventors: Andrew Platzer, John Harper
  • Publication number: 20220285288
    Abstract: A stiffener for an integrated circuit (IC) package assembly including an IC die electrically interconnected to a substrate. The stiffener is to be mechanically attached to the substrate adjacent to at least one edge of the IC die and have a coefficient of linear thermal expansion (CTE) exceeding that of the substrate. The stiffener may be an “anti-invar” metallic alloy. Anti-invar alloys display “anti-invar” behavior where thermal expansion of the material is significantly enhanced relative to other compositions of the particular alloy system. A package stiffener may be a high-Mn steel, for example, such as ASTM International A128. In other examples, a package stiffener is a MnCuNi, FeNiMn, or FeNiCr alloy having an average CTE over a range of 25-100° C. of at least 18 ppm, and a room temperature modulus of elasticity of at least 120 GPa.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 8, 2022
    Applicant: Intel Corporation
    Inventors: Valery Ouvarov-Bancalero, John Harper, Malavarayan Sankarasubramanian, Patrick Nardi, Bamidele Daniel Falola, Ravi Siddappa, James Mertens
  • Publication number: 20220102234
    Abstract: An integrated circuit (IC) package comprising a die having a front side and a back side. A solder thermal interface material (STIM) comprising a first metal is over the backside. The TIM has a thermal conductivity of not less than 40 W/mK; and a die backside material (DBM) comprising a second metal over the STIM, wherein the DBM has a CTE of not less than 18×10?6 m/mK, wherein an interface between the STIM and the DBM comprises at least one intermetallic compound (IMC) of the first metal and the second metal.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Susmriti Das Mahapatra, Malavarayan Sankarasubramanian, Shenavia Howell, John Harper, Mitul Modi
  • Patent number: 11222456
    Abstract: A graphics animation and compositing operations framework has a layer tree for interfacing with the application and a render tree for interfacing with a render engine. Layers in the layer tree can be content, windows, views, video, images, etc., for an application's user interface. The application commits state changes of the layers of the layer tree. The application does not need to include explicit code for animating the changes to the layers. Instead, after a synchronization threshold has been met, an animation is determined for animating the change in state by the framework which can define a set of predetermined animations based on motion, visibility and transition. The determined animation is explicitly applied to the affected layers in the render tree. A render engine renders from the render tree into a frame buffer, synchronized with the display. Portions of the render tree changing relative to prior versions can be tracked.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: January 11, 2022
    Assignee: Apple Inc.
    Inventors: Ralph Brunner, John Harper, Peter Graffagnino
  • Publication number: 20210209611
    Abstract: A computerized system and method of managing events surrounding the lifecycle of used and new mobile devices. The system provides a “360 view” that integrates a mobile device's service options, such as financing and device protection, as well as at the device level regarding potential hardware/software errors. This provides an end-to-end view of consumers, such as claims on device protection plans, repayment issues, utilization of upgrades and/or other information in a user's profile across multiple underlying systems during the device's lifecycle.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 8, 2021
    Inventors: MARIELA MILLINGTON, RANGA RAJAMANICKAM, JOHN HARPER, CLAY BODNAREK
  • Patent number: 10970722
    Abstract: A computerized system and method of managing events surrounding the lifecycle of used and new mobile devices. The system provides a “360 view” that integrates a mobile device's service options, such as financing and device protection, as well as at the device level regarding potential hardware/software errors. This provides an end-to-end view of consumers, such as claims on device protection plans, repayment issues, utilization of upgrades and/or other information in a user's profile across multiple underlying systems during the device's lifecycle.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: April 6, 2021
    Assignee: Brightstar Corp.
    Inventors: Mariela Millington, Ranga Rajamanickam, John Harper, Clay Bodnarek
  • Publication number: 20210082798
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Inventors: Xiao LU, Jiongxin LU, Christopher COMBS, Alexander HUETTIS, John HARPER, Jieping ZHANG, Nachiket R. RARAVIKAR, Pramod MALATKAR, Steven A. KLEIN, Carl DEPPISCH, Mohit SOOD