Patents by Inventor John Hartzell

John Hartzell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050215066
    Abstract: Methods are provided for forming silicon dioxide (SiO2) on a silicon carbide (SiC) substrate. The method comprises: providing a SiC substrate; supplying an atmosphere including oxygen; performing a high-density (HD) plasma-based process; and, forming a SiO2 layer overlying the SiC substrate. Typically, performing the HD plasma-based process includes connecting a top electrode to an inductively coupled HD plasma source. In one aspect, SiO2 is grown on the SiC substrate. Then, an HD plasma oxidation process is performed that creates a reactive oxygen species and breaks the Si—C bonds in the SiC substrate, to form free Si and C atoms in the SiC substrate. The free Si atoms in the SiC substrate are bonded to the HD plasma-generated reactive oxygen species, and the SiO2 layer is grown.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 29, 2005
    Inventors: Pooran Joshi, Apostolos Voutsas, John Hartzell
  • Publication number: 20050202653
    Abstract: A method is provided for forming a Si and Si—Ge thin films. The method comprises: providing a low temperature substrate material of plastic or glass; supplying an atmosphere; performing a high-density (HD) plasma process, such as an HD PECVD process using an inductively coupled plasma (ICP) source; maintaining a substrate temperature of 400 degrees C., or less; and, forming a semiconductor layer overlying the substrate that is made from Si or Si-germanium. The HD PECVD process is capable of depositing Si at a rate of greater than 100 ? per minute. The substrate temperature can be as low as 50 degrees C. Microcrystalline Si, a-Si, or a polycrystalline Si layer can be formed over the substrate. Further, the deposited Si can be either intrinsic or doped. Typically, the supplied atmosphere includes Si and H. For example, an atmosphere can be supplied including SiH4 and H2, or comprising H2 and Silane with H2/Silane ratio in the range of 0-100.
    Type: Application
    Filed: June 17, 2004
    Publication date: September 15, 2005
    Inventors: Pooran Joshi, Apostolos Voutsas, John Hartzell
  • Publication number: 20050202652
    Abstract: A high-density plasma hydrogenation method is provided. Generally, the method comprises: forming a silicon (Si)/oxide stack layer; plasma oxidizing the Si/oxide stack at a temperature of less than 400° C., using a high density plasma source, such as an inductively coupled plasma (ICP) source; introducing an atmosphere including H2 at a system pressure up to 500 milliTorr; hydrogenating the stack at a temperature of less than 400 degrees C., using the high density plasma source; and forming an electrode overlying the oxide. The electrode may be formed either before or after the hydrogenation. The Si/oxide stack may be formed in a number of ways. In one aspect, a Si layer is formed, and the silicon layer is plasma oxidized at a temperature of less than 400 degrees C., using an ICP source. The oxide formation, additional oxidation, and hydrogenation steps can be conducted in-situ in a common chamber.
    Type: Application
    Filed: December 15, 2004
    Publication date: September 15, 2005
    Inventors: Pooran Joshi, Apostolos Voutsas, John Hartzell
  • Publication number: 20050179086
    Abstract: Single-crystal devices and a method for forming semiconductor film single-crystal domains are provided. The method comprises: forming a substrate, such as glass or Si; forming an insulator film overlying the substrate; forming a single-crystal seed overlying the substrate and insulator; forming an amorphous film overlying the seed; annealing the amorphous film; and, forming a single-crystal domain in the film responsive to the single-crystal seed. The annealing technique can be (conventional) laser annealing, a laser induced lateral growth (LiLAC) process, or conventional furnace annealing. In some aspects, forming a single-crystal seed includes forming a nanowire or a self assembled monolayer (SAM). For example, a Si nanowire can be formed having a crystallographic orientation of <110> or <100>. When, the seed has a <100> crystallographic orientation, then an n-type TFT can be formed.
    Type: Application
    Filed: April 7, 2005
    Publication date: August 18, 2005
    Inventors: Apostolos Voutsas, John Hartzell
  • Publication number: 20050153475
    Abstract: Processing and systems to create, and resulting products related to, very small-dimension singular, or monolithically arrayed, semiconductor mechanical devices. Processing is laser performed on selected semiconductor material whose internal crystalline structure becomes appropriately changed to establish the desired mechanical properties for a created device.
    Type: Application
    Filed: February 14, 2005
    Publication date: July 14, 2005
    Inventor: John Hartzell
  • Publication number: 20050136695
    Abstract: An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is formed at a temperature of less than 400° C. using an inductively coupled plasma source. In some aspects of the method, the oxide layer is more than 20 nanometers (nm) thick and has a refractive index between 1.45 and 1.47. In some aspects of the method, the oxide layer is formed by plasma oxidizing the silicon layer, producing plasma oxide at a rate of up to approximately 4.4 nm per minute (after one minute). In some aspects of the method, a high-density plasma enhanced chemical vapor deposition (HD-PECVD) process is used to form the oxide layer. In some aspects of the method, the silicon and oxide layers are incorporated into a thin film transistor.
    Type: Application
    Filed: January 28, 2005
    Publication date: June 23, 2005
    Inventors: Pooran Joshi, John Hartzell, Masahiro Adachi, Yoshi Ono
  • Publication number: 20050130360
    Abstract: A piezo-TFT cantilever microelectromechanical system (MEMS) and associated fabrication processes are provided. The method comprises: providing a substrate, such as glass for example; forming thin-films overlying the substrate; forming a thin-film cantilever beam; and simultaneously forming a TFT within the cantilever beam. The TFT is can be formed least partially overlying a cantilever beam top surface, at least partially overlying a cantilever beam bottom surface, or embedded within the cantilever beam. In one example, forming thin-films on the substrate includes: selectively forming a first layer with a first stress level; selectively forming a first active Si region overlying the first layer; and selectively forming a second layer overlying the first layer with a second stress level. The thin-film cantilever beam is formed from the first and second layers, while the TFT source/drain (S/D) and channel regions are formed from the first active Si region.
    Type: Application
    Filed: January 5, 2005
    Publication date: June 16, 2005
    Inventors: Changqing Zhan, Michael Wolfson, John Hartzell
  • Patent number: 6878640
    Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: April 12, 2005
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Apostolos Voutsas, John Hartzell
  • Publication number: 20040140206
    Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 22, 2004
    Applicant: Sharp Laboratories of America, Inc.
    Inventors: Apostolos Voutsas, John Hartzell
  • Patent number: 6717178
    Abstract: A thin film transistor includes an active silicon layer deposited by physical vapor deposition (PVD), wherein a silicon precursor is doped with impurities prior to use as a target in the PVD chamber, wherein the precursor has a resistivity in the range of about 0.5 &OHgr;-cm<&rgr;s<60 &OHgr;-cm; and wherein the target includes plural, rectangular tiles wherein all individual tiles are larger than 8.5 inches square.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: April 6, 2004
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Yukihiko Nakata, Apostolos Voutsas, John Hartzell
  • Patent number: 6673220
    Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: January 6, 2004
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Apostolos Voutsas, John Hartzell
  • Publication number: 20030106572
    Abstract: A system and method have been provided for cleaning integrated circuit and liquid crystal display substrates of organic residue, such as photoresist, using a high concentrate ozonated water. Chilled water is used to increase the ozone concentration in the water to approximately 90 parts per million. The cleaning method is especially effective when used subsequent to an organic stripping process. The etching rates of the combined process are effective, and the use of the high concentrate ozonated water after the organic stripper also removes any contaminants on the substrate accumulated as a result of using the organic stripper.
    Type: Application
    Filed: December 12, 2001
    Publication date: June 12, 2003
    Inventors: Hirohiko Nishiki, James M. Atkinson, John Hartzell
  • Publication number: 20020192933
    Abstract: A method of forming a thin film device includes preparing a substrate; forming a silicon target having predetermined impurities therein; depositing a layer of amorphous silicon by physical vapor deposition from the target; and crystallizing the amorphous silicon layer to form a polysilicon layer. The method of the invention is particularly suited to the formation of thin film transistors and liquid crystal displays incorporating thin film transistors.
    Type: Application
    Filed: August 13, 2002
    Publication date: December 19, 2002
    Inventors: Yukihiko Nakata, Apostolos Voutsas, John Hartzell
  • Publication number: 20020171123
    Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.
    Type: Application
    Filed: May 21, 2001
    Publication date: November 21, 2002
    Inventors: Apostolos Voutsas, John Hartzell
  • Patent number: 6432804
    Abstract: A method of forming a thin film device includes preparing a substrate; forming a silicon target having predetermined impurities therein; depositing a layer of amorphous silicon by physical vapor deposition from the target; and crystallizing the amorphous silicon layer to form a polysilicon layer. The method of the invention is particularly suited to the formation of thin film transistors and liquid crystal displays incorporating thin film transistors.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: August 13, 2002
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Yukihiko Nakata, Apostolos Voutsas, John Hartzell