Abstract: A vehicle centre console table system includes: a table; an actuation system configured to, based on an electrical signal, elevate the table from a first position to a second position above the first position, wherein in the first position the table is in a substantially horizontal orientation and defines a vehicle centre console surface, and wherein in the elevated second position the table is in the substantially horizontal orientation; a slider configured to enable horizontal sliding of the table from the second position to an aft position rearward of the second position; and a pivot proximal to a fore end of the table, configured to enable turning of the table along a horizontal arc, in clockwise and anti-clockwise directions, between a first operating angle to a first side ?y of the aft position and a second operating angle to a second opposite side +y of the aft position.

Abstract: A cupholder system for a vehicle includes: a cupholder assembly comprising a first cupholder opening; a lid configured to, when in a closed position, cover at least the first cupholder opening, and when in an open position, uncover the first cupholder opening; and an actuation system configured to, in dependence on an electrical signal, deploy the lid in a first path to the open position and deploy the cupholder assembly in a second path from a stowed position to a deployed position.

Abstract: Methods related to producing a fermented plant-based food product comprising high protein content.

Abstract: A deployable leg rest assembly (3) for mounting to a seat pan (9) of a vehicle seat frame (11) comprises a leg support (4), a mounting plate (13) and a deployment mechanism (6) for deploying the leg support (4). The deployment mechanism (6) connects the leg support (4) to the mounting plate (13). The mounting plate (13) is adapted to be located above the seat pan (9). The deployable leg rest assembly (3) can be mounted to different vehicle seats (1) by accessing the seat pans (9) of the corresponding vehicle seat frames (11).

Abstract: A deployable leg rest assembly (3) for mounting to a seat pan (9) of a vehicle seat frame (11) comprises a leg support (4), a mounting plate (13) and a deployment mechanism (6) for deploying the leg support (4). The deployment mechanism (6) connects the leg support (4) to the mounting plate (13). The mounting plate (13) is adapted to be located above the seat pan (9). The deployable leg rest assembly (3) can be mounted to different vehicle seats (1) by accessing the seat pans (9) of the corresponding vehicle seat frames (11).

Abstract: Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

Abstract: Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

Abstract: A process for sorting large files or structures is disclosed where improved performance is achieved by reducing the work involved and the time required to do record key comparisons. The reduction is achieved by transposing and saving the key data from each record into a representative form that can be more quickly compared each time the key comparison is required. In addition the process uses pointers to avoid the processing time to exchange records larger than one word in memory. The representation of the key data is optimized and aligned for comparison by word based computer instructions which are typically faster than byte based instructions. The process is optimized for word sizes and instructions which handle words larger than four bytes and in particular for machines and instructions with 64-bit or larger word sizes such as the Intel Itanium series processors.

Abstract: Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

Abstract: An apparatus (20) forms a latent indicium onto a sensitized medium, using an area energy source (26) for applying a substantially uniform sensitizing energy over an area of the sensitized medium and a pixel exposure source (30) for applying radiant energy to expose a pattern of pixels (14) onto the area of the sensitized medium for forming the indicium.