Patents by Inventor John Hengeveld

John Hengeveld has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5430660
    Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: July 4, 1995
    Assignee: Tektronix, Inc.
    Inventors: Jonathan Lueker, John Hengeveld, Brad Needham, Burt Price, Jim Schlegel, Mehrab Sedeh
  • Patent number: 5252977
    Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: October 12, 1993
    Assignee: Tektronix, Inc.
    Inventors: Jonathan Lueker, John Hengeveld, Brad Needham, Burt Price, Jim Schlegel, Mehrab Sedeh
  • Patent number: 5249132
    Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: September 28, 1993
    Assignee: Tektronix, Inc.
    Inventors: Jonathan Lueker, John Hengeveld, Brad Needham, Burt Price, Jim Schlegel, Mehrab Sedeh
  • Patent number: 5224129
    Abstract: A digital architecture for a pulse generator provides a method of synchronizing signals of the pulse generator. The pulse generator has a timebase card, a microprocessor and a plurality of pulse cards. The microprocessor controls the parameters of the timebase card and pulse cards, and the timebase card provides a common master clock signal to all of the pulse cards determined by a triggerable voltage controlled oscillator that has two sources of frequency control voltage, an internal DAC for absolute frequency and a frequency comparison circuit for synchronization with an external timebase. The pulse cards produce pulses, either singly or in bursts, with the leading and trailing edges being separately positionable using quantum, sliver and vernier controls. A pattern RAM on each pulse card provides a pulse pattern that provides an approximation of the desired pulses to one quantum, and repeated iterations through the pattern RAM provide bursts of pulses.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: June 29, 1993
    Assignee: Tektronix, Inc.
    Inventors: Jonathan Lueker, John Hengeveld, Brad Needham, Burt Price, Jim Schlegel, Mehrab Sedeh
  • Patent number: 5208598
    Abstract: A digital architecture for a pulse generator includes a triggerable voltage controlled oscillator (VCO) with two alternative sources of frequency control voltage, an internal DAC or a phase frequency comparison with an external timebase. In a top octave of operation, the output of the triggerable VCO is used to produce output pulses whose edge locations are then adjusted by small digital increments or "slivers" and very small analog increments or "verniers". In lower octaves of operation, the contents of a pattern RAM serve to frequency divide the triggerable VCO output frequency by powers of two. The RAM contents are converted to a serial bit stream that imposes the coarse pulse width and period as an integral number of top octave periods, or quanta. The edge locations are then adjusted with slivers and verniers, as in the top octave. Automatic calibration facilities are included.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: May 4, 1993
    Assignee: Tektronix, Inc.
    Inventors: Jonathan Lueker, John Hengeveld, Brad Needham, Burt Price, Jim Schlegel, Mehrab Sedeh