Abstract: A method, article of manufacture and apparatus for simulating a plurality of transactions. A first group of transactions with first simulation properties are provided and a second group of transactions with second simulation properties are provided. The first simulation properties are different from the second simulation properties. During software simulation of a hardware model, the first group of transactions and the second group of transactions are issued to the hardware model. The first group of transactions and the second group of transactions are processed using the hardware model. At least a portion of the first group of transactions and the second group of transactions is processed simultaneously using the hardware model. The first simulation properties are used to process the first group of transactions using the hardware model and wherein the second simulation properties are used to process the second group of transactions using the hardware model.

Abstract: A method and apparatus are provided for implementing multiple configurations of multiple input/output (IO) subsystems in a single simulation model. At least one bus routing switch is included in the single simulation model. Each bus routing switch includes a plurality of ports respectively connected to a plurality of IO busses. Predefined ones of the plurality of IO busses are connected to respective multiple input/output (IO) subsystems in the single simulation model. The bus routing switch is selectively configurable for interconnecting predetermined ones of the plurality of ports. The bus routing switch includes a variable delay latch structure to simulate the effect of long wires. Each bus routing switch includes a plurality of multiplexers. Each of the plurality of multiplexers includes inputs connected to the plurality of ports, an output connected to a respective one of the plurality of ports and has a control input for configuring the bus routing switch.

Abstract: A method and apparatus are provided for implementing multiple configurations of multiple input/output (IO) subsystems in a single simulation model. At least one bus routing switch is included in the single simulation model. Each bus routing switch includes a plurality of ports respectively connected to a plurality of IO busses. Predefined ones of the plurality of IO busses are connected to respective multiple input/output (IO) subsystems in the single simulation model. The bus routing switch is selectively configurable for interconnecting predetermined ones of the plurality of ports. The bus routing switch includes a variable delay latch structure to simulate the effect of long wires. Each bus routing switch includes a plurality of multiplexers. Each of the plurality of multiplexers includes inputs connected to the plurality of ports, an output connected to a respective one of the plurality of ports and has a control input for configuring the bus routing switch.