Abstract: A chain and a chain and sprocket assembly for a roller, bush, or inverted tooth chain is disclosed. The chain has at least two types of link plates having different profiles, with at least one type of link plate having a leading corner for interaction with a contact ring on the sprocket, thereby reducing noise by reducing chordal action and by breaking up the regular timing of roller-sprocket (or bushing-sprocket) and link plate-sprocket impact. A method of reducing noise in a chain and sprocket assembly is also disclosed.

Abstract: Novel methods for reliably and reproducibly forming magnetic tunnel junctions in integrated circuits are described. In accordance with aspects of the invention, sidewall spacer features are utilized during the processing of the film stack. Advantageously, these sidewall spacer features create a tapered masking feature which helps to avoid byproduct redeposition during the etching of the MTJ film stack, thereby improving process yield. Moreover, the sidewall spacer features may be used as encapsulating layers during subsequent processing steps and as vertical contacts to higher levels of metallization.

Abstract: A chain and a chain and sprocket assembly for a roller, bush, or inverted tooth chain is disclosed. The chain has at least two types of link plates having different profiles, with at least one type of link plate having a leading corner for interaction with a contact ring on the sprocket, thereby reducing noise by reducing chordal action and by breaking up the regular timing of roller-sprocket (or bushing-sprocket) and link plate-sprocket impact. A method of reducing noise in a chain and sprocket assembly is also disclosed.

Abstract: A method of encapsulating conductive lines of semiconductor devices and a structure thereof. An encapsulating protective material comprising TaN, Ta, Ti, TiN, or combinations thereof is disposed over conductive lines of a semiconductor device. The encapsulating protective material protects the conductive lines from harsh etch chemistries when a subsequently deposited material layer is patterned and etched. The encapsulating protective material is conductive and may be left remaining in the completed semiconductor device. The encapsulating material is patterned using a masking material, and processing of the semiconductor device is then continued. The masking material may be left remaining in the structure as part of a subsequently deposited insulating material layer.

Abstract: A magneto resistive memory device is fabricated by etching a blanket metal stack comprised of a buffer layer, pinned magnetic layer, a tunnel barrier layer and a free magnetic layer. The problem of junction shorting from resputtered metal during the etching process is eliminated by formation of a protective spacer covering the side of the freelayer and tunnel barrier interface. The spacer is formed following the first etch through the free layer which stops on the barrier layer. After spacer formation a second etch is made to isolate the device. The patterning of the device tunnel junction is made using a disposable mandrel method that enables a self-aligned contact to be made following the completion of the device patterning process.

Abstract: A method of forming a magnetic switching device is provided. The method includes depositing a bilayer hardmask, which may comprise a first mask layer of titanium nitride with a second mask layer of tungsten formed thereon. A first lithography process is performed to pattern the second mask layer, and a second lithography process is performed to pattern the first mask layer. Thereafter, the magnetic tunnel junction stack may be patterned in accordance with the first mask layer. An etching process may be performed to further pattern the first mask layer in accordance with the second mask layer. An optional passivation layer may be formed over the first mask layer and the second mask layer.

Abstract: A method for aligning an opaque, active device in a semiconductor structure includes forming an opaque layer over an optically transparent layer formed on a lower metallization level, the lower metallization level including one or more alignment marks formed therein. A portion of the opaque layer is patterned and opened corresponding to the location of the one or more alignment marks in the lower metallization level so as to render the one or more alignment marks optically visible. The opaque layer is then patterned with respect to the lower metallization level, using the optically visible one or more alignment marks.

Abstract: A load handling systems for manipulating a load onto and off of a vehicle, which moves the load about three axes of rotation during the loading and unloading process and which does not reversibly engage the vehicle. An embodiment is a load handling system that includes three support arms pivotally attached and serially disposed, the support arms being controllably rotated relative to one another by lift mechanisms in a manner that moves a connector for connecting the load handling system to the load about three axes of rotation as it moves from a transit position to a load-disengaging position.

Abstract: A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method includes depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.

Abstract: A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method comprises depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.

Abstract: A magneto resistive memory device is fabricated by etching a blanket metal stack comprised of a buffer layer, pinned magnetic layer, a tunnel barrier layer and a free magnetic layer. The problem of junction shorting from resputtered metal during the etching process is eliminated by formation of a protective spacer covering the side of the freelayer and tunnel barrier interface. The spacer is formed following the first etch through the free layer which stops on the barrier layer. After spacer formation a second etch is made to isolate the device. The patterning of the device tunnel junction is made using a disposable mandrel method that enables a self-aligned contact to be made following the completion of the device patterning process.

Abstract: A time division-multiplexing system for a vehicle, using data signals adapted to pass through the system in a cyclical manner during each of a series of time intervals, comprising at least one system controller. The system controller includes a microcontroller and generates at least one controller output in the form of a multiple byte waveform and the at least one controller output is communicatively connected to a remote system controller. The remote system controller monitors bits in a binary configuration to identify time intervals associated with said at least one controller output.

Abstract: The present invention utilizes a reducing plasma treatment step to enhance the adhesion of a subsequently deposited inorganic barrier film to a copper wire or via present in a semiconductor interconnect structure such as a dual damascene structure.