Abstract: Streams of data are processed. A stream of data including a plurality of encoded symbols is received. Symbols from a first subset of the encoded symbols are processed contemporaneously to determine a second subset of encoded symbols, each of which uses a common coding context. At least one symbol from the second subset is evaluated to determine the common coding context. The common coding context is used to process the second subset of encoded symbols.

Abstract: Streams of data are processed. A stream of data including a plurality of encoded symbols is received. Symbols from a first subset of the encoded symbols are processed contemporaneously to determine a second subset of encoded symbols, each of which uses a common coding context. At least one symbol from the second subset is evaluated to determine the common coding context. The common coding context is used to process the second subset of encoded symbols.

Abstract: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.

Abstract: Bursts of data are managed. Data is stored in a machine readable memory device a first time at a first memory address. The machine readable memory device has one or more burst boundaries. The first memory address has a first alignment with respect to the burst boundaries. The data is stored in the machine readable memory device a second time at a second memory address. The second memory address has a second alignment with respect to the burst boundaries.

Abstract: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.

Abstract: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.

Abstract: A system and method that use a first clock to digitally generate a second clock, wherein the ratio of the frequency of the first clock to the frequency of the second clock is a non-integer. Circuitry may be used to ensure that the first clock, or input clock, has a frequency at least equal to the highest of the desired output frequencies. The input clock may be used to generate several output clocks with different frequencies. If one of the output clocks has the same frequency as the input clock, the circuitry can be bypassed. The different clocks may be used to drive parts of a system, each of which may require a different frequency.

Abstract: Streams of data are processed. A stream of data including a plurality of encoded symbols is received. Symbols from a first subset of the encoded symbols are processed contemporaneously to determine a second subset of encoded symbols, each of which uses a common coding context. At least one symbol from the second subset is evaluated to determine the common coding context. The common coding context is used to process the second subset of encoded symbols.

Abstract: Bursts of data are managed. Data is stored in a machine readable memory device a first time at a first memory address. The machine readable memory device has one or more burst boundaries. The first memory address has a first alignment with respect to the burst boundaries. The data is stored in the machine readable memory device a second time at a second memory address. The second memory address has a second alignment with respect to the burst boundaries.

Abstract: A high-speed data processor and data compression method includes an input module for receiving an input data stream from an input port. An encoder is coupled to the input module and performs arithmetic coding to encode the input data stream. An output module provides an encoded data stream from the encoder to an output port. During the encoding process, the encoder performs a combination of parallel and serial processing steps on data in the input data stream. As a result, the processing cycle time for the encoding process is significantly reduced.