Abstract: Composite video timing adjustments using digital resampling provides precise sub-pixel timing relative to a timing reference with a single video master clock. A digital resampler interpolates an input digital composite video signal as a function of a phase offset input which defines a fractional clock period of the video master clock derived from the timing reference. The sub-pixel offset digital composite video signal also may be adjusted by integer multiples of the video master clock period using a FIFO memory. The final timing adjusted digital composite video signal then is input to an analog reconstruction circuit to provide an output analog composite video signal that is precisely timed to the timing reference.

Abstract: A phase locked loop (PLL) chain for locking audio sampling to serial digital component video timing has a deserializer that recovers a video sample clock signal from a serial digital video signal, the deserializer including a wide bandwidth PLL. A tracking filter in the form of a narrow bandwidth PLL having a low pass filter function reduces the jitter in the video sample clock signal to produce a stable reference clock signal. The stable reference clock signal is input to an audio sample clock generator to produce a stable audio sample clock signal for extracting audio data from the serial digital video signal.

Abstract: A hue control circuit for adjusting the color phase of a composite PAL television signal without demodulating the chrominance component of the composite PAL television signal uses a polyphase interpolator to change the phase of the modulated chrominance component. A set of coefficients corresponding to a desired hue adjustment is applied to the polyphase interpolator. A hue coefficient address circuit addresses a coefficient memory containing a plurality of sets of coefficients, the sets being in complementary pairs. During each horizontal blanking line interval for a given desired hue adjustment the hue coefficient address circuit swaps the sets of coefficients between the complementary pair defining the desired hue adjustment in synchronization with the alternating sign of one of the color difference components of the modulated chrominance component on a line by line basis.

Abstract: A digital signal synthesizer stores a representation of a desired analog signal in the form of digital samples. The digital samples are converted to an analog signal by a sample clock having a frequency greater than or equal to twice the bandwidth of the desired analog signal. The analog signal is band pass filtered to recover the desired analog signal.

Abstract: An angle modulated periodic waveform is synthesized by generating three digital number sequences. In a first number sequence, one number thereof is generated on each occurrence of a periodic clock signal and has a magnitude which is a selected first periodic function of the number of prior occurring clock signals. In a second number sequence, one number thereof is generated on each occurrence of the clock signal and has a magnitude which is a selected second function of prior occurring numbers of the first number sequence and an applied constant carrier waveform frequency parameter. Each number of the second number sequence is added as it is generated to a stored second address number. In the third number sequence, one number thereof is generated on each occurrence of the clock signal and has a magnitude which is a selected third periodic function of the stored second address number.