Abstract: A processor is provided that includes a primary memory and color conversion logic. The primary memory may store a first color look-up table (LUT) related to a second color space. The color conversion logic, in response to a received set of pixels having color values in a first color space, converts the received set of pixels to a second color space. The color conversion logic selectively accesses, based on a comparison of one or more pixel parameters to a threshold, one of the primary memory and a secondary memory located on a second device to obtain a color value of the second color space that is associated with each pixel of the set of pixels. The color conversion logic monitors the number of times that each of the primary memory and the secondary memory are accessed and automatically adjusts the threshold to maintain an access ratio.

Abstract: Disclosed is a method of validating the contents of a real-time clock in a digital circuit. A plurality of memory elements create a first random signature value when power is newly applied to a circuit. The plurality of memory elements maintain the first random signature value while power to the circuit is maintained. The first random signature value is stored as a reference value such that the reference value is not altered by a power interruption. When power to the circuit is lost and then regained, a second random signature value is created. The second random signature value likely will no longer match the reference value because both the reference value and the second signature are random. When the reference value does not match the signature value, the real-time clock value is considered invalid. User input may be employed to correct the real-time clock value.

Abstract: A processor is provided that includes a primary memory and color conversion logic. The primary memory may store a first color look-up table (LUT) related to a second color space. The color conversion logic, in response to a received set of pixels having color values in a first color space, converts the received set of pixels to a second color space. The color conversion logic selectively accesses, based on a comparison of one or more pixel parameters to a threshold, one of the primary memory and a secondary memory located on a second device to obtain a color value of the second color space that is associated with each pixel of the set of pixels. The color conversion logic monitors the number of times that each of the primary memory and the secondary memory are accessed and automatically adjusts the threshold to maintain an access ratio.

Abstract: A processor is provided that includes a primary memory of a processor and color conversion logic. The primary memory is to store a first color look-up table (LUT) related to a second color space. The color conversion logic is responsive to a received set of pixels, where each pixel of the set of pixels includes a color value in a first color space. The color conversion logic includes decision logic to selectively access the first color LUT and a second color LUT of a secondary memory to obtain a color value of the second color space that is associated with each pixel of the set of pixels based on a comparison of each pixel to at least one neighboring pixel.

Abstract: An inkjet firing architecture for use in association with a device utilizing an ink jet head. The inkjet firing architecture includes a fire synchronization block including an N-entry delay line, at least one vector sequencing block, and a vector compositing block. The N-entry delay line is operable to simultaneously delay multiple incoming external events for varying periods of time prior to passing each of the events to one of M event sub-dividing stages and provide a fire synchronization block output that is related at least in part to the delayed incoming external events. Each of the M event sub-dividing stages emits a programmable series of sub-events, each of the sub-events being separated in time by a sub-event interval. Each programmable series of sub-events ends with an independent Mth level sub-event that is passed along as the fire synchronization block output to the at least one vector sequencing block.

Abstract: A processor is provided that includes a primary memory of a processor and color conversion logic. The primary memory is to store a first color look-up table (LUT) related to a second color space. The color conversion logic is responsive to a received set of pixels, where each pixel of the set of pixels includes a color value in a first color space. The color conversion logic includes decision logic to selectively access the first color LUT and a second color LUT of a secondary memory to obtain a color value of the second color space that is associated with each pixel of the set of pixels based on a comparison of each pixel to at least one neighboring pixel.