Patents by Inventor John J. Naughton

John J. Naughton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7940499
    Abstract: Current protection in integrated circuit having multiple pads. Different types of current protection structures may be associated with different pads. A common current discharge or charge path may be used to provide current to or draw current from various of these heterogenic current protection structures. Since a common current discharge or charge path is used, the metallization used to formulate a discharge solution is significant simplified. Additionally, the protection structures may be provided with selectively conductive regions that are approximately radially symmetrical around the circumference of the pad. Accordingly, if the protection structures are slightly off center with respect to the bond pad (due to, for example, mask alignment error), the error in the amount of active region around the circumference of the pad is at least partially averaged out.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: May 10, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Matthew A. Tyler, John J. Naughton
  • Patent number: 7825454
    Abstract: In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: November 2, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: John J. Naughton, Matthew Tyler
  • Publication number: 20100244116
    Abstract: In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.
    Type: Application
    Filed: June 3, 2010
    Publication date: September 30, 2010
    Inventors: John J. Naughton, Matthew Tyler
  • Patent number: 7776677
    Abstract: In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: August 17, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: John J. Naughton, Matthew Tyler
  • Patent number: 7655496
    Abstract: A method of fabricating a semiconductor device includes patterning a layer of photoresist onto a surface of a wafer to define metal feature areas and residual metal areas. A layer of metal is deposited over the patterned layer of photoresist, the metal layer includes metal feature portions in the metal feature areas, residual metal areas in the residual metal areas, and residual metal flaps at the edges of the metal feature portions. The wafer is sprayed with high-pressure solvent at a pressure to dissolve the layer of photoresist and to physically remove the residual metal portions from the residual metal areas, leaving only at least a portion of the residual metal flaps. The wafer is sprayed with a stream of frozen gas particles to remove the residual metal flaps.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: February 2, 2010
    Assignee: FLIR Systems, Inc.
    Inventors: Patrick Franklin, John J. Naughton
  • Patent number: 7636226
    Abstract: A current protection circuit that uses a sequence of bipolar transistors to provide or draw current from a protected circuit node. An initial bipolar transistor has its emitter terminal coupled to the protected circuit node, with its collector terminal coupled to a current source or sink. One or more additional intermediary bipolar transistors are also provided in the sequence. Each additional intermediary bipolar transistor has its emitter terminal coupled to the base terminal of the previous bipolar transistor in the sequence, and has its collector terminal coupled to the current source or sink. To complete the sequence, a reverse-biased diode is coupled between the base terminal of the final intermediary bipolar transistor and the current source or sink. This allows for effective triggering of current protection for a protected circuit node without requiring a zener diode.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: December 22, 2009
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Matthew A. Tyler, John J. Naughton
  • Patent number: 7456441
    Abstract: A current dissipation circuit that dissipates excess current to or from a circuit node when that monitored circuit node experiences abnormal voltage conditions, rather than having that excess current being dissipated through other protected circuitry. The current dissipation circuit may use single well technology, and may even provide reverse voltage protection without necessarily triggering more significant current dissipation. In another embodiment, the current dissipation circuit is provided by a series connection of at least five alternating p-type and n-type regions provided between the monitored circuit node and a current source or sink.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: November 25, 2008
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Matthew A. Tyler, John J. Naughton
  • Publication number: 20080137252
    Abstract: A current protection circuit that uses a sequence of bipolar transistors to provide or draw current from a protected circuit node. An initial bipolar transistor has its emitter terminal coupled to the protected circuit node, with its collector terminal coupled to a current source or sink. One or more additional intermediary bipolar transistors are also provided in the sequence. Each additional intermediary bipolar transistor has its emitter terminal coupled to the base terminal of the previous bipolar transistor in the sequence, and has its collector terminal coupled to the current source or sink. To complete the sequence, a reverse-biased diode is coupled between the base terminal of the final intermediary bipolar transistor and the current source or sink. This allows for effective triggering of current protection for a protected circuit node without requiring a zener diode.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Applicant: AMI Semiconductor, Inc.
    Inventors: Matthew A. Tyler, John J. Naughton
  • Publication number: 20080067605
    Abstract: A current dissipation circuit that dissipates excess current to or from a circuit node when that monitored circuit node experiences abnormal voltage conditions, rather than having that excess current being dissipated through other protected circuitry. The current dissipation circuit may use single well technology, and may even provide reverse voltage protection without necessarily triggering more significant current dissipation. In another embodiment, the current dissipation circuit is provided by a series connection of at least five alternating p-type and n-type regions provided between the monitored circuit node and a current source or sink.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 20, 2008
    Applicant: AMI Semiconductor, Inc.
    Inventors: Matthew A. Tyler, John J. Naughton
  • Publication number: 20080067602
    Abstract: Current protection in integrated circuit having multiple pads. Different types of current protection structures may be associated with different pads. A common current discharge or charge path may be used to provide current to or draw current from various of these heterogenic current protection structures. Since a common current discharge or charge path is used, the metallization used to formulate a discharge solution is significant simplified. Additionally, the protection structures may be provided with selectively conductive regions that are approximately radially symmetrical around the circumference of the pad. Accordingly, if the protection structures are slightly off center with respect to the bond pad (due to, for example, mask alignment error), the error in the amount of active region around the circumference of the pad is at least partially averaged out.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 20, 2008
    Applicant: AMI Semiconductor, Inc.
    Inventors: Matthew A. Tyler, John J. Naughton