Patents by Inventor John J. Quintus

John J. Quintus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8936416
    Abstract: A portable air abrasion device has a dispensing chamber and a flow valve for controlling the flow rate from the dispensing chamber. The flow valve includes a fluid flow chamber for receiving granular materials exiting the dispensing chamber. The fluid flow chamber has a granular materials inlet port, a fluid flow inlet port for receiving the flow of a fluid to the fluid flow chamber and a fluidized granular material exit port for dispensing a fluidized mixture of the granular material away from the fluid flow chamber. The fluid flow chamber also has a flow regulator employing a lead screw to control the flow of fluidized granular material through the fluidized granular material exit port.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: January 20, 2015
    Assignee: Crystal-Mark, Inc., A Swan Technologies Corporation
    Inventors: William H. Stutz, Jr., Jawn P. Swan, Keith D. Swan, E. Michael Swan, John J. Quintus
  • Publication number: 20140328636
    Abstract: A portable air abrasion device has a dispensing chamber and a flow valve for controlling the flow rate from the dispensing chamber. The flow valve includes a fluid flow chamber for receiving granular materials exiting the dispensing chamber. The fluid flow chamber has a granular materials inlet port, a fluid flow inlet port for receiving the flow of a fluid to the fluid flow chamber and a fluidized granular material exit port for dispensing a fluidized mixture of the granular material away from the fluid flow chamber. The fluid flow chamber also has a flow regulator employing a lead screw to control the flow of fluidized granular material through the fluidized granular material exit port.
    Type: Application
    Filed: March 7, 2014
    Publication date: November 6, 2014
    Inventors: William H. Stutz, JR., Jawn P. Swan, Keith D. Swan, E. Michael Swan, John J. Quintus
  • Patent number: 5844481
    Abstract: An intrusion detector for security systems includes a stationary host unit and a transponder unit secured to a movable door, window or the like. The host unit is secured to a stationary frame in alignment with the transponder unit. A pair of electromagnetic coupling elements are supported upon the host unit and are aligned with a corresponding mirror image pair of electromagnetic coupling units supported on the transponder unit. The host unit provides a burst of power signal which is magnetically coupled to the transponder unit and rectified therein to provide operative power for the transponder unit. The host unit further provides a data signal magnetically coupled to the transponder unit which communicates a random number to the transponder unit. The transponder unit calculates a pseudo-random number using a predetermined algorithm and communicates the random number back to the host unit. The host unit performs an identical calculation upon the random number to provide a reference pseudo-random number.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: December 1, 1998
    Inventors: John J. Quintus, Louis J. Finkle
  • Patent number: 5172280
    Abstract: An apparatus and a method for calibrating the write current applied to a write head (110, 114) in a tape drive (100) finds the peak value of the write current applied to the tape head (110, 114) (i.e., the write current value providing the maximum read voltage amplitude on a tape (104)) by indirectly measuring the voltage sensed by a read head (112, 115). The apparatus includes a digital write current control circuit (170, 160) that applies a write current having a magnitude responsive to a digital write current value. An amplifier (190) in a read circuit (180, 182, 184, 190, 196) has a gain responsive to a digital read gain value. The method includes the steps of sampling the output of a pattern detector (146) (e.g., a gap detector) as the digital read gain value is adjusted for each of a number of digital write current data values applied to the write current control circuit (170, 160).
    Type: Grant
    Filed: October 26, 1989
    Date of Patent: December 15, 1992
    Assignee: Archive Corporation
    Inventors: John J. Quintus, Michael S. Sheehan, Tuong M. Vu
  • Patent number: 5006819
    Abstract: A phase locked loop circuit including ramp generating circuitry for generating a dual slope ramp signal having alternating positive and negative slopes that are controlled by the level of the control signal, and sampling circuitry responsive to sample command pulses for providing a sample output representative of the level of the dual ramp signal at the time of sampling. The sample output is provided to a loop which provides the control signal for the ramp generating circuit. Also disclosed is a phase locked loop having ramp generating circuitry for generating a ramp signal, and track and hold circuitry having a plurality of track/hold capacitors that are controlled to track the ramp voltage or hold the ramp signal voltage in response to a sample command signal, such that only a capacitor that is tracking is switched to hold the ramp voltage in response to the sample command signal.
    Type: Grant
    Filed: May 21, 1990
    Date of Patent: April 9, 1991
    Assignee: Archive Corporation
    Inventors: William A. Buchan, John J. Quintus
  • Patent number: 4833418
    Abstract: An apparatus for nullifying the differential output offset voltage between the outputs of a differential amplifier and for setting the DC levels of the outputs to a known reference voltage includes a circuit which cross-couples the opposing AC output signals to obtain only the DC components of each signal. The apparatus further includes a first operational amplifier to generate a compensation voltage from the DC components of the outputs of the differential amplifier proportional to the amount of offset between the DC components of the outputs of the differential amplifier. The compensation voltage is fed back to the offset control inputs of the differential amplifier to reduce the differential offset voltage to substantially zero volts. The apparatus further includes a dual voltage divider network having a second operational amplifier that supplies a variable reference voltage to one terminal of each leg of the voltage divider network.
    Type: Grant
    Filed: September 1, 1988
    Date of Patent: May 23, 1989
    Assignee: Archive Corporation
    Inventors: John J. Quintus, Michael S. Sheehan